Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= full range, T
A
= -40°C to +125°C, unless otherwise specified. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Operating Voltage Range
SYMBOL
V
CC
V
CC
= 5.5V, no load
V
CC
Supply Current
I
CC
V
CC
= 3.6V, no load
V
CC
= 2.5V, no load
V
CC
= 1.8V, no load
V
CC
Reset Threshold
(See Reset Thresholds table)
Reset Threshold Tempco
V
CC
to Reset Delay
T
A
= +25°C
V
TH
T
A
= -40°C to +125°C
∆V
TH
/°C
V
CC
falling at 10mV/µs from V
TH
+ 100mV
to V
TH
- 100mV
D1
D2
Reset Timeout Period
MAX6381–MAX6389
(See Reset Timeout table)
D3
t
RP
D5
D6
D4
D7
MR
timeout period
Reset Timeout Period
MAX6390
t
RP
V
CC
timeout period
V
IL
V
TH
< 4V
MR
Input Voltage
V
IH
V
IL
V
IH
V
TH
> 4V
0.7 x
V
CC
0.8
2.4
D4
D7
D4
D7
1
20
140
280
560
1120
1200
140
150
1120
1200
V
TH
-
1.5%
V
TH
-
2.5%
CONDITIONS
MIN
1.0
7
6
4
3
V
TH
V
TH
60
35
2
40
280
560
1120
2240
2400
280
300
2240
2400
0.3 x
V
CC
V
ms
ms
TYP
MAX
5.5
13
11
7
6
V
TH
+
1.5%
V
V
TH
+
2.5%
ppm/°C
µs
µA
UNITS
V
2
SC70/µDFN, Single/Dual Low-Voltage,
Low-Power µP Reset Circuits
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= full range, T
A
= -40°C to +125°C, unless otherwise specified. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
MR
Minimum Input Pulse Width
MR
Glitch Rejection
MR
to Reset Delay
MR
Internal Pullup Resistance
MAX6381–MAX6389
MAX6390
T
A
= +25°C
RESET IN Input Threshold
V
THRST
T
A
= 0°C to +85°C
T
A
= -40°C to +125°C
RESET IN to RESET Delay
RESET IN Input Leakage Current
Open-Drain
RESET
Output
Voltage
Open-Drain
RESET
Output
Leakage Current
I
RESET IN
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset asserted
V
OL
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset asserted
V
CC
≥
1.0V, I
SINK
= 80µA, reset asserted
I
LKG
V
CC
> V
TH
,
RESET
not asserted
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset asserted
V
OL
Push-Pull
RESET
Output Voltage
V
OH
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset asserted
V
CC
≥
1.0V, I
SINK
= 80µA, reset asserted
V
CC
≥
4.5V, I
SOURCE
= 800µA, reset not
asserted
V
CC
≥
2.5V, I
SOURCE
= 500µA, reset not
asserted
V
CC
≥
4.5V, I
SOURCE
= 800µA, reset asserted
V
CC
≥
2.5V, I
SOURCE
= 500µA, reset asserted
V
OH
V
CC
≥
1.8V, I
SOURCE
= 150µA, reset asserted
Push-Pull RESET Output Voltage
V
CC
≥
1.0V, I
SOURCE
= 1µA, reset asserted
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset not
asserted
V
OL
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset not
asserted
0.8 x
V
CC
0.8 x
V
CC
0.8 x
V
CC
0.8 x
V
CC
0.8 x
V
CC
0.8 x
V
CC
0.4
0.3
V
RESETIN
falling at 4mV/µs from
V
THRST
+ 40mV to V
THRST
- 40mV
-50
32
500
1.245
1.232
1.219
4.5
±1
+50
0.4
0.3
0.3
1.0
0.4
0.3
0.3
V
µA
V
SYMBOL
CONDITIONS
MIN
1
100
200
63
1560
1.27
100
3000
1.295
1.308
1.321
µs
nA
V
TYP
MAX
UNITS
µs
ns
ns
kΩ
Ω
MAX6381–MAX6390
V
Note 1:
Specifications over temperature are guaranteed by design, not production tested.
FPGA/CPLD
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