19-0381; Rev 2; 9/01
Multi-Range (±10V, ±5V, +10V, +5V),
Single +5V, 12-Bit DAS with 8+4 Bus Interface
_______________General Description
The MAX197 multi-range, 12-bit data-acquisition sys-
tem (DAS) requires only a single +5V supply for opera-
tion, yet accepts signals at its analog inputs that may
span both above the power-supply rail and below
ground. This system provides 8 analog input channels
that are independently software programmable for a
variety of ranges: ±10V, ±5V, 0V to +10V, or 0V to +5V.
This increases effective dynamic range to 14 bits, and
provides the user flexibility to interface 4mA-to-20mA,
±12V, and ±15V powered sensors to a single +5V sys-
tem. In addition, the converter is overvoltage tolerant to
±16.5V; a fault condition on any channel does
not
affect the conversion result of the selected channel.
Other features include a 5MHz bandwidth track/hold, a
100ksps throughput rate, software-selectable internal or
external clock and acquisition, 8+4 parallel interface,
and an internal 4.096V or an external reference.
A hardware
SHDN
pin and two programmable power-
down modes (STBYPD, FULLPD) are provided for low-
current shutdown between conversions. In STBYPD
mode, the reference buffer remains active, eliminating
start-up delays.
The MAX197 employs a standard microprocessor (µP)
interface. A three-state data I/O port is configured to
operate with 8-bit data buses, and data-access and
bus-release timing specifications are compatible with
most popular µPs. All logic inputs and outputs are
TTL/CMOS compatible.
The MAX197 is available in 28-pin DIP, wide SO, SSOP,
and ceramic SB packages.
For a different combination of ranges (±4V, ±2V, 0V to
4V, 0V to 2V), refer to the MAX199 data sheet. For 12-bit
bus interface, refer to the MAX196 and MAX198 data
sheets.
IT
TION K E
VALUA
E
ABL
L AVAIL
MANUA
____________________________Features
o
12-Bit Resolution, 1/2LSB Linearity
o
Single +5V Operation
o
Software-Selectable Input Ranges:
±10V, ±5V, 0V to 10V, 0V to 5V
o
Fault-Protected Input Multiplexer (±16.5V)
o
8 Analog Input Channels
o
6µs Conversion Time, 100ksps Sampling Rate
o
Internal or External Acquisition Control
o
Internal 4.096V or External Reference
o
Two Power-Down Modes
o
Internal or External Clock
MAX197
______________Ordering Information
PART
MAX197ACNI
TEMP RANGE
0°C to +70°C
PIN-PACKAGE
28 Narrow Plastic DIP
MAX197BCNI
0°C to +70°C
28 Narrow Plastic DIP
MAX197ACWI
0°C to +70°C
28 Wide SO
MAX197BCWI
0°C to +70°C
28 Wide SO
MAX197ACAI
0°C to +70°C
28 SSOP
MAX197BCAI
0°C to +70°C
28 SSOP
MAX197BC/D
0°C to +70°C
Dice*
Ordering Information continued at end of data sheet.
*Dice
are specified at T
A
= +25°C, DC parameters only.
__________________Pin Configuration
TOP VIEW
CLK 1
CS 2
WR 3
RD 4
28 DGND
27 V
DD
26 REF
25 REFADJ
________________________Applications
Industrial-Control Systems
Robotics
Data-Acquisition Systems
Automatic Testing Systems
Medical Instruments
Telecommunications
HBEN 5
SHDN 6
D7 7
D6 8
D5 9
D4 10
D3/D11 11
D2/D10 12
D1/D9 13
D0/D8 14
MAX197
24 INT
23 CH7
22 CH6
21 CH5
20 CH4
19 CH3
18 CH2
17 CH1
16 CH0
15 AGND
Functional Diagram appears at end of data sheet.
DIP/SO/SSOP/Ceramic SB
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Multi-Range (±10V, ±5V, +10V, +5V),
Single +5V, 12-Bit DAS with 8+4 Bus Interface
MAX197
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND............................................................-0.3V to +7V
AGND to DGND.....................................................-0.3V to +0.3V
REF to AGND..............................................-0.3V to (V
DD
+ 0.3V)
REFADJ to AGND.......................................-0.3V to (V
DD
+ 0.3V)
Digital Inputs to DGND...............................-0.3V to (V
DD
+ 0.3V)
Digital Outputs to DGND ............................-0.3V to (V
DD
+ 0.3V)
CH0–CH7 to AGND ..........................................................±16.5V
Continuous Power Dissipation (T
A
= +70°C)
Narrow Plastic DIP (derate 14.29mW/°C above +70°C)....1143mW
Wide SO (derate 12.50mW/°C above +70°C)..............1000mW
SSOP (derate 9.52mW/°C above +70°C) ......................762mW
Narrow Ceramic SB (derate 20.00mW/°C above +70°C)..1600mW
Operating Temperature Ranges
MAX197_C_ _ .......................................................0°C to +70°C
MAX197_E_ _.....................................................-40°C to +85°C
MAX197_M_ _ ..................................................-55°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
ACCURACY
(Note 1)
Resolution
Integral Nonlinearity
Differential Nonlinearity
INL
DNL
Unipolar
Offset Error
Bipolar
Channel-to-Channel Offset
Error Matching
Unipolar
Bipolar
Unipolar
Gain Error
(Note 2)
Bipolar
Gain Temperature Coefficient
(Note 2)
Unipolar
Bipolar
MAX197A
MAX197B
Up to the 5th harmonic
80
50kHz, V
IN
= ±5V (Note 3)
External CLK mode/external acquisition control
External CLK mode/external acquisition
control
Internal CLK mode/internal acquisition
control (Note 4)
-86
15
<50
10
70
69
-85
-78
MAX197A
MAX197B
MAX197A
MAX197B
3
5
MAX197A
MAX197B
MAX197A
MAX197B
±0.1
±0.5
±7
±10
±7
±10
ppm/°C
LSB
MAX197A
MAX197B
12
±1/2
±1
±1
±3
±5
±5
±10
LSB
LSB
Bits
LSB
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC SPECIFICATIONS
(10kHz sine-wave input, ±10Vp-p, f
SAMPLE
= 100ksps)
Signal-to-Noise + Distortion Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Crosstalk
Aperture Delay
SINAD
THD
SFDR
dB
dB
dB
dB
ns
ps
ns
Aperture Jitter
2
_______________________________________________________________________________________
Multi-Range (±10V, ±5V, +10V, +5V),
Single +5V, 12-Bit DAS with 8+4 Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
ANALOG INPUT
Track/Hold Acquisition Time
f
CLK
= 2.0MHz
±10V range
Small-Signal Bandwidth
-3dB rolloff
±5V range
0V to 10V range
0V to 5V range
Unipolar
Input Voltage Range
(See Table 1)
Bipolar
Unipolar
Input Current
Bipolar
Input Dynamic Resistance
Input Capacitance
INTERNAL REFERENCE
REF Output Voltage
REF Output Tempco
Output Short-Circuit Current
Load Regulation
Capacitive Bypass at REF
REFADJ Output Voltage
REFADJ Adjustment Range
Buffer Voltage Gain
REFERENCE INPUT
(Buffer disabled, reference input applied to REF pin)
Input Voltage Range
Input Current
Normal or STANDBY
power-down mode
V
REF
= 4.18V
FULL power-down
mode
Normal or STANDBY power-down mode
FULL power-down mode
2.4
4.18
400
µA
1
10
5
V
DD
- 50mV
kΩ
MΩ
V
V
With recommended circuit (Figure 1)
0mA to 0.5mA output current (Note 6)
4.7
2.465
2.500
±1.5
1.6384
2.535
V
REF
TC V
REF
T
A
= +25°C
4.076
4.096
40
30
7.5
4.116
V
ppm/°C
mA
mV
µF
V
%
V/V
Unipolar
Bipolar
(Note 5)
0V to 10V range
0V to 5V range
-10V to 10V range
-5V to 5V range
-1200
-600
21
16
40
0
0
-10
-5
5
2.5
2.5
1.25
10
5
10
5
720
360
720
360
kΩ
pF
µA
V
MHz
3
µs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX197
Input Resistance
REFADJ Threshold for
Buffer Disable
_______________________________________________________________________________________
3
Multi-Range (±10V, ±5V, +10V, +5V),
Single +5V, 12-Bit DAS with 8+4 Bus Interface
MAX197
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
POWER REQUIREMENTS
Supply Voltage
V
DD
Normal mode, bipolar ranges
Supply Current
I
DD
Normal mode, unipolar ranges
Standby power-down (STBYPD)
Full power-down mode (FULLPD) (Note 7)
Power-Supply Rejection Ratio
(Note 8)
TIMING
Internal Clock Frequency
External Clock Frequency Range
f
CLK
f
CLK
t
ACQI
Acquisition Time
t
ACQE
Conversion Time
Throughput Rate
Bandgap Reference
Start-Up Time
Reference Buffer Settling
t
CONV
Internal acquisition
External CLK
Internal CLK
C
CLK
= 100pF
1.25
0.1
3.0
3.0
3.0
5
6.0
6.0
62
200
C
REF
= 4.7µF
C
REF
= 33µF
2.4
0.8
V
IN
= 0V or V
DD
(Note 5)
V
DD
= 4.75V, I
SINK
= 1.6mA
V
DD
= 4.75V, I
SOURCE
= 1mA
(Note 5)
V
DD
- 1
15
±10
15
0.4
8
60
7.7
10.0
100
µs
ksps
µs
ms
5.0
µs
1.56
2.00
2.0
MHz
MHz
PSRR
External reference = 4.096V
Internal reference
±
1
/
2
6
700
4.75
5.25
18
10
850
120
±
1
/
2
V
mA
µA
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
External acquisition (Note 9)
After FULLPD or STBYPD
External CLK
Internal CLK, C
CLK
= 100pF
External CLK
Internal CLK, C
CLK
= 100pF
Power-up (Note 10)
To 0.1mV REF bypass
capacitor fully discharged
DIGITAL INPUTS
(D7–D0, CLK,
RD, WR, CS,
HBEN,
SHDN)
(Note 11)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
Output Low Voltage
Output High Voltage
Three-State Output Capacitance
V
INH
V
INL
I
IN
C
IN
V
OL
V
OH
C
OUT
V
V
µA
pF
V
V
pF
DIGITAL OUTPUTS
(D7–D4, D3/D11, D2/D10, D1/D9, D0/D8,
INT)
4
_______________________________________________________________________________________
Multi-Range (±10V, ±5V, +10V, +5V),
Single +5V, 12-Bit DAS with 8+4 Bus Interface
TIMING CHARACTERISTICS
(V
DD
= 5V ±5%; unipolar/bipolar range; external reference mode, V
REF
= 4.096V; 4.7µF at REF pin; external clock, f
CLK
= 2.0MHz
with 50% duty cycle; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
CS
Pulse Width
WR
Pulse Width
CS
to
WR
Setup Time
CS
to
WR
Hold Time
CS
to
RD
Setup Time
CS
to
RD
Hold Time
CLK to
WR
Setup Time
CLK to
WR
Hold Time
Data Valid to
WR
Setup
Data Valid to
WR
Hold
RD
Low to Output Data Valid
HBEN High or HBEN Low to
Output Valid
RD
High to Output Disable
RD
Low to
INT
High Delay
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
SYMBOL
t
CS
t
WR
t
CSWS
t
CSWH
t
CSRS
t
CSRH
t
CWS
t
CWH
t
DS
t
DH
t
DO
t
DO1
t
TR
t
INT1
Figure 2, C
L
= 100pF (Note 12)
Figure 2, C
L
= 100pF (Note 12)
(Note 13)
60
0
120
120
70
120
CONDITIONS
MIN
80
80
0
0
0
0
100
50
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX197
Accuracy specifications tested at V
DD
= 5.0V. Performance at power-supply tolerance limits guaranteed by Power-Supply
Rejection test. Tested for the ±10V input range.
External reference: V
REF
= 4.096V, offset error nulled, ideal last code transition = FS - 3/2LSB.
Ground "on" channel; sine wave applied to all "off" channels.
Maximum full-power input frequency for 1LSB error with 10ns jitter = 3kHz.
Guaranteed by design. Not tested.
Use static loads only.
Tested using internal reference.
PSRR measured at full-scale.
External acquisition timing: starts at data valid at ACQMOD = low control byte; ends at rising edge of
WR
with ACQMOD
= high control byte.
Not subject to production testing. Provided for design guidance only.
All input control signals specified with t
R
= t
F
= 5ns from a voltage level of 0.8V to 2.4V.
t
DO
and t
DO1
are measured with the load circuits of Figure 2 and defined as the time required for an output to cross 0.8V
or 2.4V.
t
TR
is defined as the time required for the data lines to change by 0.5V.
_______________________________________________________________________________________
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
