SiT3372
Features
Advanced Information
The Smart Timing Choice
10 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Applications
Any frequency between 10 MHz and 220 MHz accurate to 6
decimal places
Widest pull range options: ±25, ±50, ±80, ±100, ±150, ±200,
±400, ±800, ±1600, ±3200ppm
0.23 ps RMS phase jitter (Typ) over 12 kHz to 20 MHz bandwidth
Wide temperature range support from -40°C to 85°C
Contact SiTime for other temperature range options
Industry-standard packages: 3.2x2.5, 7.0x5.0 mm
Contact SiTIme for 5.0 x 3.2 mm package
For frequencies 220 MHz to 700 MHz, refer to SiT3373 datasheet
Remote Radio Head (RRH), Cable Modem Termination System
(CMTS), Video, Broadcasting System, Audio, Industrial Sensors
SATA, SAS, 10GB Ethernet, Fibre Channel, PCI-Express
Electrical Characteristics
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with 15 pF output load
unless otherwise stated. Typical values are at 25°C and nominal supply voltage
Table 1. Electrical Characteristics - Common to LVPECL, LVDS and HCSL
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
10
–
220
MHz
Accurate to 6 decimal places
Frequency Stability
-15
Frequency Stability
F_stab
-25
-30
-50
-20
-40
–
–
–
–
–
–
+15
+25
+30
+50
+70
+85
Supply Voltage
2.97
Supply Voltage
Vdd
2.7
2.52
2.25
3.3
3.0
2.8
2.5
3.63
3.3
3.08
2.75
V
V
V
V
ppm
ppm
ppm
ppm
°C
°C
Extended Commercial
Industrial. Contact SiTime for other temperature range options.
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, load variations, and first year aging at 25°C
condition
Temperature Range
Operating Temperature Range
T_use
Voltage Control Characteristics
Pull Range
Upper Control Voltage
Lower Control Voltage
Control Voltage Input Impedance
Control Voltage Input Bandwidth
Pull Range Linearity
Frequency Change Polarity
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
PR
VC_U
VC_L
VC_z
V_c
Lin
–
VIH
VIL
Z_in
70%
–
–
±25, ±50, ±80, ±100, ±150, ±200,
±400, ±800, ±1600, ±3200ppm
90%
–
–
–
–
–
–
10
10
1
Positive Slope
–
–
100
–
30%
-
–
10%
–
–
TBD
ppm
Vdd
Vdd
MΩ
kHz
%
–
Vdd
Vdd
kΩ
Pin 2, OE
Pin 2, OE
Pin 2, OE logic high or logic low
Contact SiTime for other input bandwidth options
See the last page for Absolute Pull Range, APR Table.
Contact SiTime for custom pull range options.
Voltage at which maximum frequency deviation is guaranteed
Voltage at which minimum frequency deviation is guaranteed
Input Characteristics
SiTime Corporation
Rev. 0.25
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised September 21, 2016
SiT3372
Advanced Information
The Smart Timing Choice
10 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Table 2. Electrical Characteristics - Common to LVPECL, LVDS and HCSL (Cont’d)
Parameter
Duty Cycle
Start-up Time
OE Enable/Disable Time
Symbol
DC
T_start
T_oe
Min.
45
–
–
Typ.
–
–
–
Max.
55
5
515
Unit
%
ms
ns
Measured from the time Vdd reaches its rated minimum value.
f = 212.5 MHz - For other frequencies, T_oe = 500ns + 3
period
Condition
Output Characteristics
Startup and OE Timing
Table 3. Electrical Characteristics - LVPECL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
RMS Period Jitter
[1]
RMS Phase Jitter (random)
Notes:
1. Measured according to JESD65B
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
T_jitt
T_phj
Min.
–
–
–
–
Vdd-1.1
Vdd-1.9
1.2
–
–
–
–
Typ.
–
–
0.15
–
–
–
1.6
250
1
0.23
0.1
Max.
84
55
–
30
Vdd-0.7
Vdd-1.5
2.0
–
Jitter
2
–
–
ps
ps
ps
f = 156.25 MHz, VDD = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds
f = 156.25 MHz, IEEE802.3-2005 10GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdds
Unit
mA
mA
µA
mA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See Figure 2
See Figure 2
See Figure 3
20% to 80%, see Figure 2
Current Consumption
Output Characteristics
Table 4. Electrical Characteristics – LVDS Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
VOD
ΔVOD
VOS
ΔVOS
Tr, Tf
Min.
–
–
–
250
–
1.125
–
–
Typ.
–
–
0.15
–
–
–
–
340
Max.
76
55
–
450
50
1.375
50
–
Jitter
RMS Period Jitter
[2]
RMS Phase Jitter (random)
Notes:
2. Measured according to JESD65B
T_jitt
T_phj
–
–
–
1
0.23
0.1
2
–
–
ps
ps
ps
f = 156.25 MHz, VDD = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds
f = 156.25 MHz, IEEE802.3-2005 10GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdds
Unit
mA
mA
µA
mV
mV
V
mV
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
See Figure 4
See Figure 4
See Figure 4
See Figure 4
Measured with 2 pF capacitive loading to GND, 20% to 80%, see
Figure 4
Current Consumption
Output Characteristics
Rev. 0.25
Page 2 of 11
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SiT3372
Advanced Information
The Smart Timing Choice
10 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Table 5. Electrical Characteristics – HCSL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
VOH
VOL
V_Swing
Tr, Tf
Min.
–
–
–
0.6
-0.05
1
–
Typ.
–
–
0.15
–
–
1.4
350
Max.
84
55
–
0.8
0.05
1.8
–
Jitter
RMS Period Jitter
[3]
RMS Phase Jitter (random)
Notes:
3. Measured according to JESD65B
T_jitt
T_phj
–
–
–
1
0.23
0.1
2
–
–
ps
ps
ps
f = 156.25 MHz, VDD = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds
f = 156.25 MHz, IEEE802.3-2005 10GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdds
Unit
mA
mA
µA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
See Figure 2
See Figure 2
See Figure 3
Measured with 2 pF capacitive loading to GND, 20% to 80%, see
Figure 2
Current Consumption
Output Characteristics
Table 6. Pin Description
Pin
1
Symbol
VIN
Input
No Connect
(NC)
Output Enable
(OE)
Power
Output
Output
Power
Control Voltage
No Connect: Leave it floating or connect to GND for better heat
dissipation
H
[4]
: specified frequency output
L: output is high impedance. Only output driver is disabled
VDD Power Supply Ground
Oscillator output
Complementary oscillator output
Power supply voltage
[5]
Functionality
Top View
VIN
NC/OE
GND
1
6
VDD
OUT-
OUT+
2
NC/OE
2
5
3
4
5
6
GND
OUT+
OUT-
VDD
3
4
Notes:
4. In OE mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven.
5. A capacitor of value 0.1 µF or higher between Vdd and GND is required. An Additional 10 pF between Vdd and
GND is required for the best phase jitter performance
Figure 1. Pin Assignments
Rev. 0.25
Page 3 of 11
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SiT3372
Table 7. Absolute Maximum
Advanced Information
The Smart Timing Choice
10 MHz to 220 MHz Ultra-low Jitter Differential VCXO
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of
the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
VDD
Electrostatic Discharge (HBM)
Soldering Temperature (follow standard Pb free soldering guidelines)
Min.
-65
-0.5
–
–
Max.
150
4
2000
260
Unit
°C
V
V
°C
Table 8. Thermal Consideration
[6]
Package
3225, 6-pin
7050, 6-pin
θ
JA, 4 Layer Board (°C/W)
TBD
TBD
θ
JC, Bottom (°C/W)
TBD
TBD
Notes:
6. Refer to JESD51 for
θJA
and
θJC
definitions, and reference layout used to determine the
θJA
and
θJC
values in the above table.
Table 9. Maximum Operating Junction Temperature
[7]
Max Operating Temperature (ambient)
70°C
85°C
Maximum Operating Junction Temperature
80
95
Notes:
7. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 10. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev. 0.25
Page 4 of 11
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SiT3372
Waveform Diagrams
OUT-
Advanced Information
The Smart Timing Choice
10 MHz to 220 MHz Ultra-low Jitter Differential VCXO
80%
80%
20%
OUT+
20%
VOH
Tr
GND
VOL
Tf
Figure 2. LVPECL/HCSL Voltage Levels per Differential Pin (OUT+/OUT-)
V_ Swing
0V
t
Figure 3. LVPECL/HCSL Voltage Levels across Differential Pair
OUT-
80%
VOD
80%
20%
OUT+
20%
VOS
Tr
GND
Tf
Figure 4. LVDS Voltage Levels per Differential Pin (OUT+/OUT-)
Rev. 0.25
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