SiM3L1xx
High-Performance, Low-Power, 32-Bit Precision32™
MCU Family with up to 256 kB of Flash
32-bit ARM Cortex-M3 CPU
-
50 MHz maximum frequency
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Single-cycle multiplication, hardware division support
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Nested vectored interrupt control (NVIC) with 8 priority levels
Memory
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32–256 kB flash, in-system programmable
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8–32 kB SRAM with configurable low power retention
Clock Sources
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Internal oscillator with PLL: 23–50 MHz
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Low power internal oscillator: 20 MHz
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Low frequency internal oscillator (LFO): 16.4 kHz
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External real-time clock (RTC) crystal oscillator
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External oscillator: Crystal, RC, C, CMOS clock
Power Management
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Three adjustable low drop-out (LDO) regulators
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Power-on reset circuit and brownout detectors
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DC-DC buck converter allows dynamic voltage scaling for
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maximum efficiency (250 mW output)
Multiple power modes supported for low power optimization
Analog Peripherals
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12-Bit Analog-to-Digital Converter: Up to 250 ksps 12-bit mode
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2 x Low-current comparators
or 1 Msps 10-bit mode
10-Bit Current-mode Digital-to-Analog Converter
Digital and Communication Peripherals
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1 x USART with IrDA and ISO7816 Smartcard support
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1 x UART that operates in low power mode
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2 x SPIs, 1 x I2C, 16/32-bit CRC
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128/192/256-bit Hardware AES Encryption
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Encoder/Decoder: Manchester and Three-out-of-Six
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Integrated LCD Controller: up to 160 segments (40x4), auto-
contrast and low power operation
Timers/Counters
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3 x 32-bit or 6 x 16-bit timers with capture/compare
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16-bit, 6-channel counter with capture/compare/PWM and
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dead-time controller with differential outputs
16-bit low power timer/advanced capture counter operational in
the lowest power mode
32-bit real time clock (RTC) with multiple alarms
Low Power Features
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75 nA typical current in Power Mode 8
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Low-current RTC (180 nA from LFO, 300 nA from crystal)
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4 µs wakeup, register state retention and no reset required from
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140 µA/MHz at 3.6 V executing from SRAM
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Specialized on-chip charge pump reduces power consumption
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Process/Voltage/Temperature (PVT) Monitor
5 V Tolerant Flexible I/O
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Up to 62 contiguous 5 V tolerant GPIO with one priority cross-
bar providing flexibility in pin assignments
lowest power mode
175 µA/MHz at 3.6 V executing from flash
-
-
Watchdog timer
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Low power mode advanced capture counter (ACCTR)
Data Transfer Peripherals
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10-Channel DMA Controller
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3 Channel Data Transfer Manager manages complex DMA
transfers without core intervention
On-Chip Debugging
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Serial wire debug (SWD) with serial wire viewer (SWV) or JTAG
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(no boundary scan) allow debug and programming
Cortex-M3 embedded trace macrocell (ETM)
Temperature Range: –40 to +85 °C
Supply Voltage: 1.8 to 3.8 V
Power
Scalable Digital LDO
Scalable Memory LDO
Scalable Analog LDO
DC-DC Buck Converter
Low Power Mode Charge Pump
Power Management Unit
32/64/128/256 kB Flash
Package Options
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QFN options: 40-pin (6 x 6 mm), 64-pin (9 x 9 mm)
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TQFP options: 64-pin (10 x 10 mm), 80-pin (12 x 12 mm)
Core / Memory / Support
ARM Cortex M3 (50 MHz)
8/16/32 kB Retention
RAM
Analog Peripherals
SAR ADC
(12-bit 250 ksps / 10-bit 1 Msps)
Voltage Reference
Current-Source DAC
2 x Low Current Comparators
Advanced Capture Counter
Flexible Pin Muxing
10-Ch DMA Controller + 3x Data Transfer Mgr.
Watchdog
Supply Monitor
Serial Wire or JTAG Debug / Programming + ETM
Clocking / Oscillators
50 MHz PLL
Real-Time Clock w/ Dedicated Crystal Oscillator
16 kHz Low Frequency Oscillator
20 MHz Low Power Oscillator
External Clock (XTAL / RC / C / CMOS)
Clock Selection
and Gating
1 x I2C
Digital Peripherals
2 x SPI
AES
CRC
Priority Crossbar
Encoder
3 x 32-bit Timers (6 x 16-bit)
1 x UART, 1 x USART w/ IrDA/SmartCard
Encoder/Decoder
6-Channel PWM
Low-Power Timer
LCD Controller
Rev 1.1 11/14
Copyright © 2014 by Silicon Laboratories
62 Multi-Function 5V-Tolerant I/O Pins
SiM3L1xx
SiM3L1xx
Ta b l e o f C o n t e n ts
1. Related Documents and Conventions ...............................................................................5
1.1. Related Documents........................................................................................................5
1.1.1. SiM3L1xx Reference Manual.................................................................................5
1.1.2. Hardware Access Layer (HAL) API Description ....................................................5
1.1.3. ARM Cortex-M3 Reference Manual.......................................................................5
1.2. Conventions ...................................................................................................................5
2. Typical Connection Diagrams ............................................................................................6
2.1. Power .............................................................................................................................6
3. Electrical Specifications......................................................................................................8
3.1. Electrical Characteristics ................................................................................................8
3.2. Thermal Conditions ...................................................................................................... 30
3.3. Absolute Maximum Ratings..........................................................................................31
4. Precision32™ SiM3L1xx System Overview.....................................................................32
4.1. Power ........................................................................................................................... 34
4.1.1. DC-DC Buck Converter (DCDC0)........................................................................ 34
4.1.2. Three Low Dropout LDO Regulators (LDO0) ...................................................... 35
4.1.3. Voltage Supply Monitor (VMON0) ....................................................................... 35
4.1.4. Power Management Unit (PMU).......................................................................... 35
4.1.5. Device Power Modes........................................................................................... 35
4.1.6. Process/Voltage/Temperature Monitor (TIMER2 and PVTOSC0)....................... 38
4.2. I/O................................................................................................................................. 39
4.2.1. General Features.................................................................................................39
4.2.2. Crossbar .............................................................................................................. 39
4.3. Clocking........................................................................................................................ 40
4.3.1. PLL (PLL0)........................................................................................................... 41
4.3.2. Low Power Oscillator (LPOSC0) ......................................................................... 41
4.3.3. Low Frequency Oscillator (LFOSC0)................................................................... 41
4.3.4. External Oscillators (EXTOSC0).......................................................................... 41
4.4. Integrated LCD Controller (LCD0)................................................................................ 42
4.5. Data Peripherals...........................................................................................................43
4.5.1. 10-Channel DMA Controller................................................................................. 43
4.5.2. Data Transfer Managers (DTM0, DTM1, DTM2) ................................................. 43
4.5.3. 128/192/256-bit Hardware AES Encryption (AES0) ............................................ 43
4.5.4. 16/32-bit Enhanced CRC (ECRC0) .....................................................................44
4.5.5. Encoder / Decoder (ENCDEC0) .......................................................................... 44
4.6. Counters/Timers........................................................................................................... 45
4.6.1. 32-bit Timer (TIMER0, TIMER1, TIMER2)........................................................... 45
4.6.2. Enhanced Programmable Counter Array (EPCA0) ............................................. 45
4.6.3. Real-Time Clock (RTC0) ..................................................................................... 46
4.6.4. Low Power Timer (LPTIMER0)............................................................................46
4.6.5. Watchdog Timer (WDTIMER0)............................................................................46
4.6.6. Low Power Mode Advanced Capture Counter (ACCTR0)................................... 47
4.7. Communications Peripherals ....................................................................................... 48
4.7.1. USART (USART0) ............................................................................................... 48
Rev 1.1
3
SiM3L1xx
4.7.2. UART (UART0).................................................................................................... 48
4.7.3. SPI (SPI0, SPI1) .................................................................................................. 49
4.7.4. I2C (I2C0) ............................................................................................................ 49
4.8. Analog .......................................................................................................................... 50
4.8.1. 12-Bit Analog-to-Digital Converter (SARADC0)................................................... 50
4.8.2. 10-Bit Digital-to-Analog Converter (IDAC0) ......................................................... 50
4.8.3. Low Current Comparators (CMP0, CMP1) .......................................................... 50
4.9. Reset Sources..............................................................................................................51
4.10.Security ........................................................................................................................ 52
4.11.On-Chip Debugging ..................................................................................................... 52
5. Ordering Information .........................................................................................................53
6. Pin Definitions.................................................................................................................... 55
6.1. SiM3L1x7 Pin Definitions ............................................................................................. 55
6.2. SiM3L1x6 Pin Definitions ............................................................................................. 62
6.3. SiM3L1x4 Pin Definitions ............................................................................................. 69
6.4. TQFP-80 Package Specifications ................................................................................ 74
6.4.1. TQFP-80 Solder Mask Design............................................................................. 77
6.4.2. TQFP-80 Stencil Design ...................................................................................... 77
6.4.3. TQFP-80 Card Assembly..................................................................................... 77
6.5. QFN-64 Package Specifications .................................................................................. 78
6.5.1. QFN-64 Solder Mask Design............................................................................... 80
6.5.2. QFN-64 Stencil Design ........................................................................................ 80
6.5.3. QFN-64 Card Assembly....................................................................................... 80
6.6. TQFP-64 Package Specifications ................................................................................ 81
6.6.1. TQFP-64 Solder Mask Design............................................................................. 84
6.6.2. TQFP-64 Stencil Design ...................................................................................... 84
6.6.3. TQFP-64 Card Assembly..................................................................................... 84
6.7. QFN-40 Package Specifications .................................................................................. 85
6.7.1. QFN-40 Solder Mask Design............................................................................... 87
6.7.2. QFN-40 Stencil Design ........................................................................................ 87
6.7.3. QFN-40 Card Assembly....................................................................................... 87
7. Revision Specific Behavior............................................................................................... 88
7.1. Revision Identification .................................................................................................. 88
Document Change List ........................................................................................................... 90
Contact Information ................................................................................................................ 91
4
Rev 1.1
SiM3L1xx
1. Related Documents and Conventions
1.1. Related Documents
This data sheet accompanies several documents to provide the complete description of the SiM3L1xx devices.
1.1.1. SiM3L1xx Reference Manual
The Silicon Laboratories SiM3L1xx Reference Manual provides the detailed description for each peripheral on the
SiM3L1xx devices.
1.1.2. Hardware Access Layer (HAL) API Description
The Silicon Laboratories Hardware Access Layer (HAL) API provides C-language functions to modify and read
each bit in the SiM3L1xx devices. This description can be found in the SiM3xxxx HAL API Reference Manual.
1.1.3. ARM Cortex-M3 Reference Manual
The ARM-specific features like the Nested Vectored Interrupt Controller are described in the ARM Cortex-M3
reference documentation. The online reference manual can be found here:
http://infocenter.arm.com/help/topic/com.arm.doc.subset.cortexm.m3/index.html#cortexm3.
1.2. Conventions
The block diagrams in this document use the following formatting conventions:
Internal Module
Other Internal
Peripheral Block
External Memory
Block
DMA Block
Memory Block
External to MCU
Block
Input_Pin
Functional Block
Internal_Input_Signal
Output_Pin
Internal_Output_Signal
REGn_NAME / BIT_NAME
Figure 1.1. Block Diagram Conventions
Rev 1.1
5
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