Freescale Semiconductor
Data Sheet: Technical Data
Document Number: VYBRIDFSERIESEC
Rev. 7, 04/2014
VF6xx, VF5xx, VF3xx
Features
• Operating characteristics
– Voltage range 3 V to 3.6 V
– Temperature range (ambient) -40 °C to 85 °C
• ARM Cortex A5 Core features
– Up to 500 MHz ARM Cortex A5
– 32 KB/32 KB I/D L1 Cache
– 1.6 DMIPS/MHz based on ARMv7 architecture
– NEON MPE (Media Processing Engine) Co-
processor
– Double Precision Floating Point Unit
– 512 KB L2 Cache (On selected part numbers only)
• ARM Cortex M4 Core features
– Up to 167 MHz ARM Cortex M4
– Integrated DSP capability
– 64 KB Tightly Coupled Memory (TCM)
– 16 KB/16 KB I/D L1 Cache
– 1.25 DMIPS/MHz based on ARMv7 architecture
• Clocks
– 24 MHz crystal oscillator
– 32 kHz crystal oscillator
– Internal reference clocks (128 KHz and 24 MHz)
– Phase Locked Loops (PLLs)
– Low Jitter Digital PLLs
• System debug, protection, and power management
– Various stop, wait, and run modes to provide low
power based on application needs
– Peripheral clock enable register can disable clocks to
unused modules, thereby reducing currents
– Low voltage warning and detect with selectable trip
points
– Illegal opcode and illegal address detection with
programmable reset or processor exception response
– Hardware CRC module to support fast cyclic
redundancy checks (CRC)
– 128-bit unique chip identifier
– Hardware watchdog
– External Watchdog Monitor (EWM)
– Dual DMA controller with 32 channels (with
DMAMUX)
VYBRIDFSERIESEC
• Debug
– Standard JTAG
– 16-bit Trace port
• Timers
– Motor control/general purpose timer (FTM)
– Periodic Interrupt Timers (PITs)
– Low-power timer (LPTMR0)
– IEEE 1588 Timer per MAC interface (part of
Ethernet Subsystem)
• Communications
– Six Universal asynchronous receivers/transmitters
(UART)/Serial communications interface (SCI) with
LIN, ISO7816, IrDA, and hardware flow control
– Four Deserial Serial peripheral interface (DSPI)
– Four Inter-Integrated Circuit (I2C) with SMBUS
support
– Dual USB OTG Controller + PHY
– Dual 4/8 bit Secure Digital Host controller
– Dual 10/100 Ethernet with L2 Switch (IEEE 1588)
– Dual FlexCAN3
• Security
– ARM TrustZone including the TZ architecture
– Cryptographic Acceleration and Assurance Module,
incorporates 16 KB secure RAM (CAAM)
– Secure Non-Volatile Storage, including Secure Real
Time Clock (SNVS)
– Real Time Integrity Checker (RTIC)
– Tamper detection - supported by external pins, on-
chip clock monitors, voltage and temperature
tampers
– TrustZone Watchdog (TZ WDOG)
– Trust Zone Address Space Controller
– Central Security Unit
– Secure JTAG
– High Assurance Boot (HAB) with support for
encrypted boot
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2012–2013 Freescale Semiconductor, Inc.
• Memory Interfaces
– 8/16 bit DRAM Controller with support for LPDDR2/DDR3 - Up to 400 MHz (ECC supported for 8-bit only and not
16-bit)
– 8/16 bit NAND Flash controller with ECC
– 8/16/32 bit External bus (Flexbus)
– Dual Quad SPI with XIP (Execute-In-Place)
• Display and Video
– Dual Display Control Unit (DCU) with support for color TFT display up to SVGA
– Segmented LCD (3V Glass only) configurable as 40x4, 38x8, and 36x6
– Video Interface Unit (VIU) for camera
– VideoADC
• Analog
– Dual 12-bit SAR ADC with 1MS/s
– Dual 12-bit DAC
• Audio
– Four Synchronous Audio Interface (SAI)
– Enhanced Serial Audio Interface (ESAI)
– Sony Philips Digital Interface (SPDIF), Rx and Tx
– Asynchronous Sample Rate Converter (ASRC)
• Human-Machine Interface (HMI)
– GPIO pins with interrupt support, DMA request capability, digital glitch filter.
– Hysteresis and configurable pull up/down device on all input pins
– Configurable slew rate and drive strength on all output pins
• On-Chip Memory
– 512 KB On-chip SRAM with ECC
– 1 MB On-chip graphics SRAM (no ECC). This depends on the part selected. Alternate configuration could be 512 KB
graphics and 512 KB L2 cache.
– 96 KB Boot ROM
VF6xx, VF5xx, VF3xx Data Sheet, Rev. 7, 04/2014.
2
Freescale Semiconductor, Inc.
Table of Contents
1
Ordering parts.........................................................................5
1.1
2
Determining valid orderable parts ................................5
6.2.4
6.2.5
6.2.3.2
6.2.3.3
LDO_2P5......................................19
LDO_3P0 .....................................20
Part identification.....................................................................5
2.1
2.2
2.3
2.4
Description....................................................................5
Part Number Format......................................................5
Fields.............................................................................6
Part Numbers ...............................................................7
Power consumption operating behaviors.......20
USB PHY current consumption......................21
6.2.5.1
Power Down Mode.......................21
6.2.6
6.2.7
EMC radiated emissions operating behaviors 21
EMC Radiated Emissions Web Search
Procedure boilerplate.....................................22
3
Terminology and guidelines....................................................7
3.1
3.2
3.3
3.4
3.5
3.6
Definition: Operating requirement.................................7
Definition: Operating behavior.......................................8
Definition: Attribute........................................................8
Definition: Rating...........................................................9
Result of exceeding a rating..........................................9
Relationship between ratings and operating
requirements.................................................................10
3.7
3.8
3.9
Guidelines for ratings and operating requirements.......10
Definition: Typical value................................................10
Typical Value Conditions...............................................11
8
7.2
7
6.2.8
Capacitance attributes....................................22
I/O parameters........................................................................22
7.1
GPIO parameters..........................................................22
7.1.1
Output Buffer Impedance measurement........24
DDR parameters...........................................................25
Power supplies and sequencing.............................................29
8.1
8.2
8.3
8.4
8.5
Power sequencing ........................................................29
Power supply.................................................................31
Absolute maximum ratings............................................32
Recommended operating conditions.............................33
Recommended Connections for Unused Analog
Interfaces.......................................................................34
4
Handling ratings......................................................................12
4.1
4.2
4.3
ESD Handling Ratings Table [JEDEC]..........................12
Thermal handling ratings...............................................12
Moisture handling ratings..............................................12
9
Peripheral operating requirements and behaviours................35
9.1
Analog...........................................................................35
9.1.1
12-bit ADC electrical characteristics...............35
9.1.1.1
9.1.1.2
9.1.2
12-bit ADC operating conditions...35
12-bit ADC characteristics............36
5
Operating Requirements.........................................................13
5.1
Thermal operating requirements...................................13
6
General...................................................................................13
6.1
6.2
AC electrical characteristics..........................................13
Nonswitching electrical specifications ..........................14
6.2.1
VREG electrical specifications .......................14
6.2.1.1
6.2.1.2
6.2.1.3
6.2.1.4
6.2.1.5
6.2.2
HPREG electrical characteristics. .14
LPREG electrical characteristics. .14
ULPREG electrical characteristics 15
WBREG electrical characteristics. 15
External NPN Ballast....................16
9.2
9.1.3
12-bit DAC electrical characteristics...............40
9.1.2.1
12-bit DAC operating
requirements.................................40
9.1.2.2
12-bit DAC operating behaviors....40
VideoADC Specifications................................44
Display and Video interfaces.........................................46
9.2.1
DCU Switching Specifications........................46
9.2.1.1
9.2.1.2
Interface to TFT panels (DCU0/1) 46
Interface to TFT LCD Panels—
Pixel Level Timings.......................47
9.2.1.3
Interface to TFT LCD panels—
access level..................................48
9.2.2
9.2.3
Video Input Unit timing...................................49
LCD driver electrical characteristics...............50
LVD electrical specifications ..........................18
6.2.2.1
Main Supply electrical
characteristics...............................18
6.2.2.2
LVD DIG characteristics...............18
6.2.3
LDO electrical specifications .........................19
6.2.3.1
LDO_1P1......................................19
VF6xx, VF5xx, VF3xx Data Sheet, Rev. 7, 04/2014.
Freescale Semiconductor, Inc.
3
9.3
Ethernet specifications..................................................50
9.3.1
9.3.2
Ethernet Switching Specifications..................50
Receive and Transmit signal timing
specifications..................................................50
9.3.3
Receive and Transmit signal timing
specifications for MII interfaces......................52
9.7.2
9.7.3
32 KHz Oscillator Specifications.....................80
Fast internal RC oscillator (24 MHz)
electrical characteristics.................................81
9.7.4
Slow internal RC oscillator (128 KHz)
electrical characteristics.................................82
9.7.5
PLL1 and PLL2 (528 MHz System PLL)
Electrical Parameters.....................................82
9.4
Audio interfaces.............................................................54
9.4.1
Enhanced Serial Audio Interface (ESAI)
Timing Parameters.........................................54
9.4.2
9.4.3
SPDIF Timing Parameters..............................56
SAI/I2S Switching Specifications....................57
9.7.7
9.7.8
9.7.9
9.8
9.7.6
PLL3 and PLL7 (480 MHz USB PLL)
Electrical Parameters.....................................82
PLL5 (Ethernet PLL) Electrical Parameters....83
PLL4 (Audio PLL) Electrical Parameters........83
PLL6 (Video PLL) Electrical Parameters........83
9.5
Memory interfaces.........................................................59
9.5.1
9.5.2
9.5.3
9.5.4
QuadSPI timing..............................................59
NFC specifications..........................................62
FlexBus timing specifications.........................65
DDR controller specifications.........................67
9.5.4.1
9.5.4.2
9.5.4.3
9.5.4.4
9.5.4.5
9.5.4.6
DDR3 Timing Parameters ............67
DDR3 Read Cycle........................69
DDR3 Write cycle.........................70
LPDDR2 Timing Parameter..........71
LPDDR2 Read Cycle....................72
LPDDR2 Write Cycle....................73
Debug specifications.....................................................84
9.8.1
9.8.2
JTAG electricals.............................................84
Debug trace timing specifications...................86
10 Thermal attributes...................................................................87
10.1 Thermal attributes.........................................................87
11 Dimensions.............................................................................88
11.1 Obtaining package dimensions ....................................88
12 Pinouts....................................................................................89
12.1 Pinouts..........................................................................89
12.2 Pinout diagrams............................................................100
12.2.1
12.2.2
GPIO Mapping................................................102
Special Signal ................................................106
9.6
Communication interfaces.............................................74
9.6.1
9.6.2
9.6.3
9.6.4
DSPI timing specifications..............................74
I2C timing.......................................................76
SDHC specifications.......................................78
USB PHY specifications.................................79
13 Power Supply Pins..................................................................108
13.1 Power Supply Pins........................................................108
14 Functional Assignment Pins....................................................109
14.1 Functional Assignment Pins..........................................109
15 Revision History......................................................................118
9.7
Clocks and PLL Specifications......................................80
9.7.1
24 MHz Oscillator Specifications....................80
VF6xx, VF5xx, VF3xx Data Sheet, Rev. 7, 04/2014.
4
Freescale Semiconductor, Inc.
Ordering parts
1 Ordering parts
1.1 Determining valid orderable parts
Valid orderable part numbers are provided on the web.
1. To determine the orderable part numbers for this device, go to
www.freescale.com
and search the required part number. The part numbering format is described in the
section that follows.
2 Part identification
2.1 Description
Part numbers for the chip have fields that identify the specific part. You can use the
values of these fields to determine the specific part you have received.
2.2 Part Number Format
The figure below represents the format of part number of this device.
VF6xx, VF5xx, VF3xx Data Sheet, Rev. 7, 04/2014.
Freescale Semiconductor, Inc.
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
