GENERAL DESCRIPTION..................................................................................................................................... 1
FEATURES ............................................................................................................................................. 1
Theory of Operation ................................................................................................................................. 47
System Timing Summary.......................................................................................................................... 47
Data Flow ................................................................................................................................................ 50
Internal/External Pulse Generation and Pulse Counting ............................................................................. 55
Program Security ..................................................................................................................................... 56
CE Calculations.......................................................................................................................... 66
CE RAM Locations ................................................................................................................................... 67
CE Front End Data (Raw Data) ................................................................................................... 67
CE Status Word.......................................................................................................................... 67
CE Transfer Variables ................................................................................................................ 68
Meter Accuracy over Temperature (71M6511H) ........................................................................................ 76
APPLICATION INFORMATION .............................................................................................................................. 77
Connection of Sensors (CT, Resistive Shunt, Rogowski Coil) .................................................................... 77
Distinction between 71M6511 and 71M6511H Parts.................................................................................. 77
Temperature Compensation and Mains Frequency Stabilization for the RTC.............................................. 78
External Temperature Compensation........................................................................................................ 79
Temperature Measurement ...................................................................................................................... 79
ORDERING INFORMATION .................................................................................................................... 97
Figures
Figure 1: IC Functional Block Diagram .......................................................................................................................... 7
Figure 2: General Topology of a Chopped Amplifier ..................................................................................................... 10
Figure 10: LCD Voltage Boost Circuitry....................................................................................................................... 41
Figure 11: Voltage Range for V1 ................................................................................................................................ 43
Figure 12: Voltage. Current, Momentary and Accumulated Energy................................................................................ 47
Figure 13: Timing Relationship between ADC MUX, CE, and Serial Transfers ................................................................ 48
Figure 14: RTM Output Format .................................................................................................................................. 49
Figure 31: Crystal Frequency over Temperature .......................................................................................................... 78
Figure 36: Interfacing RX to a 0-5V Signal .................................................................................................................. 82
Figure 37: Connection for Optical Components ........................................................................................................... 83
Figure 38: Voltage Divider for V1 ............................................................................................................................... 83
Figure 39: External Components for RESETZ .............................................................................................................. 84
Table 3: CE DRAM Locations for ADC Results............................................................................................................. 12
Table 4: Standard Meter Equations (inputs shown gray are scanned but not used for calculation) .................................. 12
Table 6: Internal Data Memory Map ........................................................................................................................... 17
Table 7: Special Function Registers Locations............................................................................................................. 17
Table 8: Special Function Registers Reset Values ........................................................................................................ 18
Table 10: PSW bit functions ...................................................................................................................................... 19
Table 11: Port Registers ............................................................................................................................................ 20
Table 12: Special Function Registers .......................................................................................................................... 21
Table 15: The S0CON Register ................................................................................................................................... 22
Table 16: The S1CON register .................................................................................................................................... 23
Table 17: The S0CON Bit Functions ............................................................................................................................ 23
Table 18: The S1CON Bit Functions ............................................................................................................................ 24
Table 19: The TMOD Register .................................................................................................................................... 24
Table 20: TMOD Register Bit Description .................................................................................................................... 25
Table 22: The TCON Register ..................................................................................................................................... 25
Table 23: The TCON Register Bit Functions ................................................................................................................. 26
Table 25: The PCON Register ..................................................................................................................................... 26
Table 26: The IEN0 Register (see also Table 34) ......................................................................................................... 27
Table 27: The IEN0 Bit Functions (see also Table 34)................................................................................................... 27
Table 28: The IEN1 Register (see also Tables 35/36) ................................................................................................... 27
Table 29: The IEN1 Bit Functions (see also Tables 35/36) ............................................................................................ 27
Table 30: The IP0 Register (see also Table 46)............................................................................................................ 28
Table 31: The IP0 bit Functions (see also Table 46) ..................................................................................................... 28
Table 32: The WDTREL Register ................................................................................................................................ 28
Table 33: The WDTREL Bit Functions ......................................................................................................................... 28
Table 34: The IEN0 Register ...................................................................................................................................... 29
Table 35: The IEN0 Bit Functions ............................................................................................................................... 30
Table 36: The IEN1 Register ...................................................................................................................................... 31
Table 37: The IEN1 Bit Functions ............................................................................................................................... 31
Table 38: The IEN2 Register ...................................................................................................................................... 31
Table 39: The IEN2 Bit Functions ............................................................................................................................... 31
Table 40: The TCON Register ..................................................................................................................................... 32
Table 41: The TCON Bit Functions .............................................................................................................................. 32
Table 42: The IRCON Register.................................................................................................................................... 32
Table 43: The IRCON Bit Functions............................................................................................................................. 32
Table 45: Control Bits for External Interrupts .............................................................................................................. 33
Table 46: Priority Level Groups .................................................................................................................................. 34
Table 47: The IP0 Register:........................................................................................................................................ 34
Table 48: The IP1 Register:........................................................................................................................................ 34