Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(Typical
Application Circuit,
50Ω system impedance, V
AVDD
= V
DVDD
= V
HVIN
= V
PAVDD
= +2.1V to +3.6V, f
RF
= 315MHz or 433.92MHz,
T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
AVDD
= V
DVDD
= V
HVIN
= V
PAVDD
= +2.7V,
T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
Supply Voltage (3V Mode)
Supply Voltage (5V Mode)
SYMBOL
V
DD
HVIN
CONDITIONS
HVIN, PAVDD, AVDD, and DVDD
connected to power supply
PAVDD, AVDD, and DVDD unconnected
from HVIN, but connected together
Transmit mode, PA off,
V
DATA
at 0% duty
cycle (Note 2)
Transmit mode, V
DATA
at 50% duty cycle
(Notes 3, 4)
Transmit mode, V
DATA
at 100% duty cycle
(Note 2)
Supply Current
I
DD
T
A
< +85°C,
typ at +25°C
(Note 4)
f
RF
= 315MHz
f
RF
= 434MHz
f
RF
= 315MHz
f
RF
= 434MHz
f
RF
= 315MHz
f
RF
= 434MHz
Receiver 315MHz
Receiver 434MHz
Deep-sleep
(3V mode)
Deep-sleep
(5V mode)
Receiver 315MHz
T
A
< +125°C,
typ at +125°C
(Note 2)
Receiver 434MHz
Deep-sleep
(3V mode)
Deep-sleep
(5V mode)
Voltage Regulator
DIGITAL I/O
Input-High Threshold
Input-Low Threshold
V
IH
V
IL
(Note 2)
(Note 2)
0.9 x
V
HVIN
0.1 x
V
HVIN
V
V
V
REG
V
HVIN
= 5V, I
LOAD
= 15mA
MIN
2.1
4.5
TYP
2.7
5.0
3.5
4.3
7.6
8.4
11.6
12.4
6.1
6.4
0.8
2.4
6.4
6.7
8.0
14.9
3.0
MAX
3.6
5.5
5.4
6.7
12.3
13.6
19.1
20.4
7.9
8.3
8.8
µA
10.9
8.2
8.4
34.2
µA
39.3
V
mA
mA
UNITS
V
V
2
Low-Cost, 315MHz and 433.92MHz
ASK Transceiver with Fractional-N PLL
DC ELECTRICAL CHARACTERISTICS (continued)
(Typical
Application Circuit,
50Ω system impedance, V
AVDD
= V
DVDD
= V
HVIN
= V
PAVDD
= +2.1V to +3.6V, f
RF
= 315MHz or 433.92MHz,
T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
AVDD
= V
DVDD
= V
HVIN
= V
PAVDD
= +2.7V,
T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
Pulldown Sink Current
Output-Low Voltage
Output-High Voltage
V
OL
V
OH
SYMBOL
I
SINK
= 500µA
I
SOURCE
= 500µA
CONDITIONS
AGC0-2, ENABLE, T/R, DATA (V
HVIN
= 5.5V)
MIN
TYP
20
0.15
V
HVIN
- 0.26
MAX
UNITS
µA
V
V
MAX7030
AC ELECTRICAL CHARACTERISTICS
(Typical
Application Circuit,
50Ω system impedance, V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +2.1V to +3.6V, f
RF
= 315MHz or
433.92MHz, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +2.7V,
T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
GENERAL CHARACTERISTICS
Frequency Range
Maximum Input Level
Transmit Efficiency 100% Duty
Cycle
Transmit Efficiency 50% Duty
Cycle
P
RFIN
f
RF
= 315MHz (Note 6)
f
RF
= 434MHz (Note 6)
f
RF
= 315MHz (Note 6)
f
RF
= 434MHz (Note 6)
ENABLE or T/R transition low to high,
transmitter frequency settled to within
50kHz of the desired carrier
Power-On Time
t
ON
ENABLE or T/R transition low to high,
transmitter frequency settled to within
5kHz of the desired carrier
ENABLE transition low to high, or T/R
transition high to low, receiver startup
time (Note 5)
RECEIVER
Sensitivity
Image Rejection
POWER AMPLIFIER
T
A
= +25°C (Note 4)
Output Power
P
OUT
T
A
= +125°C, V
PAVDD
= V
AVDD
= V
DVDD
=
V
HVIN
= +2.1V (Note 2)
T
A
= -40°C, V
PAVDD
= V
AVDD
= V
DVDD
=
V
HVIN
= +3.6V (Note 4)
Modulation Depth
Maximum Carrier Harmonics
Reference Spur
With output-matching network
4.6
3.9
10.0
6.7
13.1
82
-40
-50
15.8
dB
dBc
dBc
15.5
dBm
0.2% BER, 4kbps Manchester
data rate, 280kHz IF BW,
average RF power
315MH
z
434MH
z
-114
dBm
-113
46
dB
315/433.92
0
32
30
24
22
200
MHz
dBm
%
%
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
350
μs
250
3
Low-Cost, 315MHz and 433.92MHz
ASK Transceiver with Fractional-N PLL
MAX7030
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical
Application Circuit,
50Ω system impedance, V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +2.1V to +3.6V, f
RF
= 315MHz or
433.92MHz, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +2.7V,
T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
PHASE-LOCKED LOOP
Transmit VCO Gain
Transmit PLL Phase Noise
Receive VCO Gain
Receive PLL Phase Noise
Loop Bandwidth
Reference Frequency Input
Level
LOW-NOISE AMPLIFIER/MIXER (Note 8)
LNA Input Impedance
Z
INLNA
Normalized to
50
High-gain state
Voltage-Conversion Gain
Low-gain state
Input-Referred, 3rd-Order
Intercept Point
Mixer-Output Impedance
LO Signal Feedthrough to
Antenna
RSSI
Input Impedance
Operating Frequency
3dB Bandwidth
Gain
ANALOG BASEBAND
Maximum Data-Filter Bandwidth
Maximum Data-Slicer Bandwidth
Maximum Peak-Detector
Bandwidth
Maximum Data Rate
Manchester coded
Nonreturn to zero (NRZ)
50
100
50
33
66
kHz
kHz
kHz
kbps
f
IF
330
10.7
10
15
MHz
MHz
mV/dB
IIP3
High-gain state
Low-gain state
f
RF
= 315MHz
f
RF
= 434MHz
f
RF
= 315MHz
f
RF
= 434MHz
f
RF
= 315MHz
f
RF
= 434MHz
1 - j4.7
1- j3.3
50
45
13
9
-42
-6
330
-100
dBm
dBm
dB
10kHz offset, 500kHz loop BW
1MHz offset, 500kHz loop BW
Transmit PLL
Receive PLL
SYMBOL
K
VCO
10kHz offset, 200kHz loop BW
1MHz offset, 200kHz loop BW
CONDITIONS
MIN
TYP
340
-68
-98
340
-80
-90
200
500
0.5
MAX
UNITS
MHz/V
dBc/Hz
MHz/V
dBc/Hz
kHz
V
P-P
4
Low-Cost, 315MHz and 433.92MHz
ASK Transceiver with Fractional-N PLL
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical
Application Circuit,
50Ω system impedance, V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +2.1V to +3.6V, f
RF
= 315MHz or
433.92MHz, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +2.7V,
T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
CRYSTAL OSCILLATOR
Crystal Frequency
Frequency Pulling by V
DD
Crystal Load Capacitance
(Note 7)
f
XTAL
(f
RF
-10.7)
/24
2
4.5
MHz
ppm/V
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX7030
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match.
100% tested at T
A
= +125°C. Guaranteed by design and characterization overtemperature.
50% duty cycle at 10kHz ASK data (Manchester coded).
Guaranteed by design and characterization. Not production tested.
Time for final signal detection; does not include baseband filter settling.
Efficiency = P
OUT
/(V
DD
x I
DD
).
Dependent on PCB trace capacitance.
Input impedance is measured at the LNAIN pin. Note that the impedance at 315MHz includes the 12nH inductive degenera-
tion from the LNA source to ground. The impedance at 434MHz includes a 10nH inductive degeneration connected from
the LNA source to ground. The equivalent input circuit is 50Ω in series with ~2.2pF. The voltage conversion is measured
with the LNA input-matching inductor, the degeneration inductor, and the LNA/mixer tank in place, and does not include the
IF filter insertion loss.
Typical Operating Characteristics
(Typical
Application Circuit,
V
PAVDD
= V
AVDD
= V
DVDD
= V
HVIN
= +3.0V, f
RF
= 433.92MHz, IF BW = 280kHz, 4kbps Manchester encod-
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