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Data Sheet
March 2003
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HI5630
FN4645.3
Triple 8-Bit, 80MSPS A/D Converter with
Internal Voltage Reference
The HI5630 is a monolithic, triple 8-bit, 80MSPS
analog-to-digital converter fabricated in an advanced CMOS
process. It is designed for digitizing RGB graphics from work
stations and personal computers. The HI5630 reaches a
new level of multi-channel integration. The fully pipeline
architecture and an innovative input stage enable the
HI5630 to accept a variety of single-ended or fully differential
input configurations which present valid data to the output
bus with a latency of 5 clock cycles. Only one external clock
is necessary to drive all three converters with a clock out
signal provided. An internal band-gap voltage reference is
also provided allowing the system designer to realize an
increased level of system integration resulting in decreased
cost and power dissipation.
The HI5630 can be bench tested using a complete ADC
evaluation board with clock drivers, ADC, latches and a
reconstruct DAC. In addition, complete LCD monitor
reference designs are available for immediate volume
production (contact factory).
Features
• Triple 8-Bit A/D Converter on a Monolithic Chip
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 80MSPS
• ENOB (f
IN
= 1MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.6
• Wide Full Power Input Bandwidth . . . . . . . . . . . . 300MHz
• Internal Band-Gap Voltage Reference . . . . . . . . . . . . 2.5V
• Excellent Channel-to-Channel Isolation . . . . . . . . . >75dB
• Single Supply Voltage Operation . . . . . . . . . . . . . . . . .+5V
• On-Chip Sample and Hold Amplifiers
• Clock Output
• Offset Binary or Two’s Complement Output Format
• Stand-By Low Power mode
Applications
• LCD Monitors, Projectors and Plasma Display Panels
• Video Digitizing (RGB, Composite or Y-C)
• Medical Imaging
Part Number Information
TEMP.
PART NUMBER RANGE (
o
C)
HI5630/8CN
HI5630EVAL1
0 to 70
25
PACKAGE
64 Ld MQFP
PKG. NO.
Q64.14x14
• High Speed Multi-Channel Data Acquisition
Pinout
HI5630
(MQFP)
TOP VIEW
BD6
BD5
BD4
BD3
DGND
DV
DD
BD2
BD1
BD0
N/C
DFS
STBY
AGND
AV
DD
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
N/C
GD7
RD0
RD1
RD2
RD3
RD4
DGND
DV
DD
RD5
RD6
RD7
N/C
AGND
AV
DD
AGND
AGND
B
IN
+
B
IN
-
BV
DC
AGND
V
RIN
V
ROUT
AV
DD
G
IN
+
G
IN
-
GV
DC
AGND
AV
DD
R
IN
+
R
IN
-
RV
DC
GD0
BD7
DGND
DV
DD
GD1
GD2
GD3
DGND
DV
DD
CLKOUT
CLKIN
DV
DD
DGND
GD4
GD5
GD6
DV
DD
DGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ADC Evaluation Platform
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HI5630
Functional Block Diagram
RV
DC
R
IN
-
R
IN
+
S/H
DC BIAS
STAGE M - 6
RD0 (LSB)
RD1
RD2
2-BIT
FLASH
2-BIT
DAC
RD3
RD4
RD5
RD6
+
∑
X2
GD0 (LSB)
GD1
GD2
GD3
X2
STAGE M
GD4
GD5
GD6
GD7 (MSB)
2-BIT
FLASH
DIGITAL DELAY
AND
DIGITAL ERROR
CORRECTION
RD7 (MSB)
-
BD0 (LSB)
BD1
BD2
BD3
GV
DC
G
IN
-
G
IN
+
SAME AS
RED ABOVE
BD4
BD5
BD6
BD7 (MSB)
BV
DC
B
IN
-
B
N
+
SAME AS
RED ABOVE
DFS
STBY
CLKIN
CLKOUT
V
ROUT
V
RIN
REFERENCE
POWER
AV
DD
AGND
DV
DD
DGND
2
HI5630
Typical Video Application Schematic
AV
DD
DV
DD
HI5630
R
IN
+
(35) R
IN
+
(33) RV
DC
(2V)
0.1µF
(34) R
IN
-
(LSB) RD0 (19)
RD1 (20)
RD2 (21)
RD3 (22)
RD4 (23)
RD5 (26)
RD6 (27)
(MSB) RD7 (28)
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
G
IN
+
(40) G
IN
+
(38) GV
DC
(2V)
0.1µF
(39) G
IN
-
DGND
B
IN
+
(47) B
IN
+
(45) BV
DC
(2V)
0.1µF
(46) B
IN
-
(LSB) GD0 (64)
GD1 (3)
GD2 (4)
GD3 (5)
GD4 (12)
GD5 (13)
GD6 (14)
(MSB) GD7 (18)
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
DGND
(LSB) BD0 (54)
BD1 (55)
(43) V
RIN
(42) V
ROUT
1.0µF
BD2 (56)
BD3 (59)
BD4 (60)
BD5 (61)
BD6 (62)
DGND
DVDD
(51) STBY
(52) DFS
(MSB) BD7 (63)
DGND
BD0
BD1
BD2
BD3
BD4
BD5
BD6
BD7
CLOCK IN
(9) CLK IN
AGND
CLK OUT (8)
DGND
CLOCK OUT
AGND
DGND
3
HI5630
Pin Description
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NAME
DGND
DV
DD
GD1
GD2
GD3
DGND
DV
DD
CLK OUT
CLK IN
DV
DD
DGND
GD4
GD5
GD6
DV
DD
DGND
NC
GD7
RD0
RD1
RD2
RD3
RD4
DGND
DV
DD
RD5
RD6
RD7
NC
AGND
AV
DD
AGND
DESCRIPTION
Digital Ground
Digital Supply (5.0V)
Green Data Bit 1 Output
Green Data Bit 2 Output
Green Data Bit 3 Output
Digital Ground
Digital Supply (5.0V)
Sample Clock Output
Sample Clock Input
Digital Supply (5.0V)
Digital Ground
Green Data Bit 4 Output
Green Data Bit 5 Output
Green Data Bit 6 Output
Digital Supply (5.0V)
Digital Ground
No Connection
Green Data Bit 7 Output
Red Data Bit 0 Output
Red Data Bit 1 Output
Red Data Bit 2 Output
Red Data Bit 3 Output
Red Data Bit 4 Output
Digital Ground
Digital Supply (5.0V)
Red Data Bit 5 Output
Red Data Bit 6 Output
Red Data Bit 7 Output
No Connection
Analog Ground
Analog Supply (5.0V)
Analog Ground
Pin Description
PIN NO.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
NAME
RV
DC
R
IN
-
R
IN
+
AV
DD
AGND
GV
DC
G
IN
-
G
IN
+
AV
DD
VROUT
V
RIN
AGND
BV
DC
B
IN
-
B
IN
+
AGND
AV
DD
AGND
STBY
DFS
NC
BD0
BD1
BD2
DV
DD
DGND
BD3
BD4
BD5
BD6
BD7
GD0
(Continued)
DESCRIPTION
Red DC Bias Voltage Output (2.0)
Red Negative Analog Input
Red Positive Analog Input
Analog Supply (5.0V)
Analog Ground
Green DC Bias Voltage Output
Green Negative Analog Input
Green Positive Analog Input
Analog Supply (5.0V)
+2.5V Reference Voltage Output
+2.5V Reference Voltage Input
Analog Ground
Blue DC Bias Voltage Output
Blue Negative Analog Input
Blue Positive Analog Input
Analog Ground
Analog Supply (5.0V)
Analog Ground
Stand-By Power Mode
Data Format Select Input
No Connection
Blue Data Bit 0 Output
Blue Data Bit 1 Output
Blue Data Bit 2 Output
Digital Supply (5.0V)
Digital Ground
Blue Data Bit 3 Output
Blue Data Bit 4 Output
Blue Data Bit 5 Output
Blue Data Bit 6 Output
Blue Data Bit 7 Output
Green Data Bit 0 Output
4
HI5630
Absolute Maximum Ratings
T
A
= 25
o
C
Supply Voltage, AV
DD
or DV
DD
to AGND or DGND . . . . . . . . . . .6V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
Digital I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to DV
DD
Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to AV
DD
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
Operating Conditions
Temperature Range
HI5630/8CN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
MQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range
. . . . . . . . .-
65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on a 1S2P (1 Signal and 2 Power) evaluation PC board in free air.
Electrical Specifications
PARAMETER
ACCURACY
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
(Guaranteed No Missing Codes)
Channel Offset Match
Channel Full Scale Error Match
Offset Code, V
OC
Full Scale Error, FSE
Bit Error Rate (BER)
ANALOG INPUT
Analog Input Range
Analog Input Resistance
Analog Input Capacitance
Analog Input Bias Current
AV
DD
= 5V, DV
DD
= 5V; Single Ended Inputs, V
RIN
= 2.5V; f
S
= 80MSPS at 50% Duty Cycle; C
L
= 10pF;
T
A
= 25
o
C; Unless Otherwise Specified
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
f
IN
= 1MHz
f
IN
= 1MHz
f
IN
= DC
f
IN
= DC
V
IN
+ = V
IN
-
f
IN
= DC
-
-
-
-
-
-
-
8
±0.4
±0.2
1
0.25
140
1
-
-
±2.0
±1.0
-
-
-
-
-
Bits
LSB
LSB
LSB
LSB
CODE
LSB
s
(Note 2)
V
IN
+ = V
IN
- = V
REF
V
IN
+ = V
IN
- = V
REF
-
-
-
-10
-
0.95
1
10
1.0
300
1
-
-
10
-
V
MΩ
pF
µA
MHz
Full Power Input Bandwidth, FPBW
INTERNAL VOLTAGE REFERENCE
1µF Decoupling Cap Needed
Reference Output Voltage, V
REF
Reference Output Current, I
ROUT
Reference Temperature Coefficient
DC BIAS PINS
RV
DC
, GV
DC
, BV
DC
with 0.1µF Decoupling Cap Needed
VDC Output Voltage (Loaded)
VDC Output Current, I
VDC
VDC Temperature Coefficient
REFERENCE VOLTAGE INPUT
Reference Voltage Input, V
RIN
Total Reference Resistance, R
RIN
Reference Current, I
RIN
DYNAMIC CHARACTERISTICS
Minimum Conversion Rate
Maximum Conversion Rate
Overclocking Conversion Rate
Transient Response
No Missing Codes
No Missing Codes
No Missing Codes
(Note 2)
V
RIN
= 2.5V
V
RIN
= 2.5V
I
REF
= 4mA
V Applied = 2.5V
2.33
-
-
2.5
2
6
2.67
4
-
V
mA
µV/
o
C
-
-
-
1.97
-
60
-
-
-
V
mA
µV/
o
C
2.2
-
-
2.5
2.93
0.95
2.8
-
-
V
kΩ
mA
1
-
-
-
-
-
95
1
-
80
-
-
MSPS
MSPS
MSPS
Cycle
5
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