STM32F415xx STM32F417xx
Arm
®
Cortex
®
-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM,
crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
Datasheet
-
production data
Features
•
Core: Arm
®
32-bit Cortex
®
-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator) allowing 0-wait state execution
from Flash memory, frequency up to 168 MHz,
memory protection unit, 210 DMIPS/
1.25 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
•
Memories
– Up to 1 Mbyte of Flash memory
– Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM
– 512 bytes of OTP memory
– Flexible static memory controller
supporting Compact Flash, SRAM,
PSRAM, NOR and NAND memories
•
LCD parallel interface, 8080/6800 modes
•
Clock, reset and supply management
– 1.8 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
•
Low-power operation
– Sleep, Stop and Standby modes
– V
BAT
supply for RTC, 20×32 bit backup
registers + optional 4 KB backup SRAM
•
3×12-bit, 2.4 MSPS A/D converters: up to 24
channels and 7.2 MSPS in triple interleaved
mode
•
2×12-bit D/A converters
•
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
FBGA
LQFP64 (10 × 10 mm)
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm)
LQFP176 (24 × 24 mm)
UFBGA176
(10 × 10 mm)
WLCSP90
(4.223x3.969 mm)
•
Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 168 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
•
Debug mode
– Serial wire debug (SWD) & JTAG
interfaces
– Cortex-M4 Embedded Trace Macrocell™
•
Up to 140 I/O ports with interrupt capability
– Up to 136 fast I/Os up to 84 MHz
– Up to 138 5 V-tolerant I/Os
•
Up to 15 communication interfaces
– Up to 3 × I
2
C interfaces (SMBus/PMBus)
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO
7816 interface, LIN, IrDA, modem control)
– Up to 3 SPIs (42 Mbits/s), 2 with muxed
full-duplex I
2
S to achieve audio class
accuracy via internal audio PLL or external
clock
– 2 × CAN interfaces (2.0B Active)
– SDIO interface
•
Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
September 2020
This is information on a product in full production.
DS8597 Rev 9
1/207
www.st.com
STM32F415xx, STM32F417xx
•
8- to 14-bit parallel camera interface up to
54 Mbytes/s
•
Cryptographic acceleration: hardware
acceleration for AES 128, 192, 256, Triple
DES, HASH (MD5, SHA-1), and HMAC
•
True random number generator
•
CRC calculation unit
•
96-bit unique ID
•
RTC: subsecond accuracy, hardware calendar
Table 1. Device summary
Reference
STM32F415xx
STM32F417xx
Part number
STM32F415RG, STM32F415VG, STM32F415ZG, STM32F415OG
STM32F417VG, STM32F417IG, STM32F417ZG, STM32F417VE,
STM32F417ZE, STM32F417IE
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DS8597 Rev 9
STM32F415xx, STM32F417xx
Contents
Contents
1
2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1
2.2
Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.12
2.2.13
2.2.14
2.2.15
2.2.16
2.2.17
2.2.18
2.2.19
2.2.20
2.2.21
2.2.22
2.2.23
2.2.24
2.2.25
2.2.26
2.2.27
2.2.28
2.2.29
Arm
®
Cortex
®
-M4 core with FPU and embedded Flash and SRAM . . . 21
Adaptive real-time memory accelerator (ART Accelerator) . . . . . . . . . . 21
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 22
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . 24
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 24
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 25
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 31
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . 31
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Universal synchronous/asynchronous receiver transmitters (USART) . 36
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . 38
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . 38
Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
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Contents
2.2.30
2.2.31
2.2.32
2.2.33
2.2.34
2.2.35
2.2.36
2.2.37
2.2.38
2.2.39
2.2.40
STM32F415xx, STM32F417xx
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . 39
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . 40
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Cryptographic acceleration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
True random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . 41
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . 41
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 42
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3
4
5
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
5.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.2
5.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
VCAP_1/VCAP_2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Operating conditions at power-up / power-down (regulator ON) . . . . . . 85
Operating conditions at power-up / power-down (regulator OFF) . . . . . 85
Embedded reset and power control block characteristics . . . . . . . . . . . 86
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . 102
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 107
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
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5.3.11
5.3.12
5.3.13
5.3.14
5.3.15
5.3.16
5.3.17
5.3.18
5.3.19
5.3.20
5.3.21
5.3.22
5.3.23
5.3.24
5.3.25
5.3.26
5.3.27
5.3.28
5.3.29
Contents
PLL spread spectrum clock generation (SSCG) characteristics . . . . . 110
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 116
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
CAN (controller area network) interface . . . . . . . . . . . . . . . . . . . . . . . 137
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 165
SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 166
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
6.1
6.2
6.3
6.4
6.5
6.6
6.7
WLCSP90 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
LQFP144 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
UFBGA176+25 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
LQFP176 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
Appendix A Application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
A.1
A.2
A.3
USB OTG full speed (FS) interface solutions . . . . . . . . . . . . . . . . . . . . . 190
USB OTG high speed (HS) interface solutions . . . . . . . . . . . . . . . . . . . . 192
Ethernet interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
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