HCS00MS
August 1995
Radiation Hardened
Quad 2-Input NAND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Cosmic Ray Upset Immunity < 2 x 10
-9
Errors/Gate Day (Typ)
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55 C to +125 C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
≤
5µA at VOL, VOH
o
o
GND 7
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14
TOP VIEW
A1
B1
Y1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
Description
The Intersil HCS00MS is a Radiation Hardened Quad 2-Input
NAND Gate. A high on both inputs forces the output to a Low
state.
The HCS00MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCS00MS is supplied in a 14 lead Ceramic flatpack (K suffix)
or a SBDIP Package (D suffix).
A2
B2
Y2
GND
TRUTH TABLE
INPUTS
An
L
Bn
L
H
L
H
OUTPUTS
Yn
H
H
H
L
Ordering Information
PART
NUMBER
HCS00DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
14 Lead SBDIP
L
H
H
NOTE: L = Logic Level Low, H = Logic level High
HCS00KMSR
-55
o
C to +125
o
C
14 Lead Ceramic
Flatpack
14 Lead SBDIP
Functional Diagram
An
(1, 4, 9, 12)
Yn
HCS00D/
Sample
HCS00K/
Sample
HCS00HMSR
+25
o
C
+25
o
C
Sample
14 Lead Ceramic
Flatpack
Bn
(3, 6, 8, 11)
Die
Die
(2, 5, 10, 13)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
15
518743
2138.2
DB NA
+25
o
C
Specifications HCS00MS
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
θ
JA
θ
JC
o
C/W
SBDIP Package. . . . . . . . . . . . . . . . . . . .
74
24
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 116
o
C/W
30
o
C/W
o
C Ambient
Maximum Package Power Dissipation at +125
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . 100ns/V Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 4.5V, VIH = 3.15V,
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V
Output Voltage High
VOH
VCC = 4.5V, VIH = 3.15V,
IOH = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOH = -50µA, VIL = 1.65V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
4.8
4.0
-4.8
-4.0
-
MAX
10
200
-
-
-
-
0.1
UNITS
µA
µA
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
VCC
-0.1
-
-
-
-
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
V
1
2, 3
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
±0.5
±5.0
-
µA
µA
-
Noise Immunity
Functional Test
FN
VCC = 4.5V,
VIH = 0.70(VCC),
VIL = 0.30(VCC) (Note 2)
7, 8A, 8B
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
Spec Number
16
518743
Specifications HCS00MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
9
10, 11
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
MAX
18
20
20
22
UNITS
ns
ns
ns
ns
PARAMETER
Input to Yn
SYMBOL
TPHL
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
VCC = 4.5V
Input to Yn
TPLH
VCC = 4.5V
VCC = 4.5V
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
SYMBOL
CPD
CONDITIONS
VCC = 5.0V, f = 1MHz
NOTES
1
1
CIN
VCC = 5.0V, f = 1MHz
1
1
Output Transition
Time
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics..
TTHL
TTLH
VCC = 4.5V
1
1
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C
+25
o
C
+125
o
C
MIN
-
-
-
-
-
-
MAX
57
77
10
10
15
22
UNITS
pF
pF
pF
pF
ns
ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
4.0
-4.0
-
VCC
-0.1
-
-
2
2
MAX
0.2
-
-
0.1
-
±5
-
20
22
UNITS
mA
mA
mA
V
V
µA
-
ns
ns
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
Noise Immunity
Functional Test
Input to Yn
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
FN
TPHL
TPLH
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V and 5.5V, VIH = 0.70 (VCC),
VIL = 0.30 (VCC), IOL = 50µA
VCC = 4.5V and 5.5V, VIH = 0.70 (VCC),
VIL = 0.30 (VCC), IOL = -50µA
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIH = 0.70 (VCC),
VIL = 0.30 (VCC), (Note 3)
VCC = 4.5V
VCC = 4.5V
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
Spec Number
17
518743
Specifications HCS00MS
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
GROUP B
SUBGROUP
5
5
PARAMETER
ICC
IOL/IOH
DELTA LIMIT
3µA
-15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
Interim Test
I
(Postburn-In)
Interim Test
II
(Postburn-In)
PDA
Interim Test
III
(Postburn-In)
PDA
Final Test
Group A (Note 1)
Group B
Subgroup B-5
Subgroup B-6
Group D
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
Sample/5005
Sample/5005
GROUP A SUBGROUPS
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9, Deltas
1, 7, 9
1, 7, 9, Deltas
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
1, 7, 9
Subgroups 1, 2, 3, 9, 10, 11
ICC, IOL/H
READ AND RECORD
ICC, IOL/H
ICC, IOL/H
ICC, IOL/H
NOTE: 1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
Group E Subgroup 2
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
METHOD
5005
PRE RAD
1, 7, 9
POST RAD
Table 4
READ AND RECORD
PRE RAD
1, 9
POST RAD
Table 4 (Note 1)
Spec Number
18
518743
Specifications HCS00MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V
±
0.5V
VCC = 6V
±
0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1)
3, 6, 8, 11
1, 2, 4, 5, 7, 9, 10, 12,
13
-
14
-
-
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
3, 6, 8, 11
7
-
1, 2, 4, 5, 9, 10, 12,
13, 14
-
-
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2)
-
7
3, 6, 8, 11
14
1, 2, 4, 5, 9, 10,
12, 13
-
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ
±
5% static burn-in.
2. Each pin except VCC and GND will have a resistor of 1KΩ
±
5% static burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
3, 6, 8, 11
GROUND
7
VCC = 5V
±
0.5V
1, 2, 4, 5, 9, 10, 12, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ
±
5%. Group E, Subgroup 2,
sample size is 4 dice/wafer, 0 failures.
Spec Number
19
518743
国产芯片交流
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
