NETWORKS
TECHNOLOGY OF TOMORROW
BUSSED R-NETWORKS
SINGLE COMMON
CNB
STRUCTURE
1
2
3
4
5
6
Ceramic substrate
Inner electrode
RuO
2
resistive film
Inner glass passivation
Outer electrode
Protective coating
CNB2E5Z
CNB2B9Z
NETWORKS
(PASSIVE COMPONENTS)
#1
IDENTIFICATION
TYPE
CNB
COATING
COLOR
Black
MARKING
White, 3 digits
„
■
” marks pin #1
Products with Pb-free terminations
meet RoHS requirements
TYPE DESIGNATION (HOW TO ORDER)
Old Part No.
New Part No.
(Pb-free)
CNB
CNB
PRODUCT
CODE
2E
2E
STYLE
2B, 2E
5
5
NO. OF
TERMINALS
9, 5
Z
Z
CIRCUIT
SYMBOL
T
TERMINATION
SURFACE MATERIAL
T: Sn
L: Sn/Pb
J
TE
TE
1K
103
NOMINAL
RESISTANCE
3 digits
J
TOLERANCE
J: ± 5%
TOLERANCE
TAPING*
*Please see “PACKAGING”
DIMENSIONS (mm)
TYPE
CNB2E5Z
CNB2B9Z
L ±0.2
3.2
6.4
W ±0.2
2.5
3.2
c (ref.)
(0.3)
(0.45)
d ±0.15
0.5
0.6
t ±0.1
0.6
a (top)
(ref.)
(0.65)
(0.85)
a (bottom)
0.55 ± 0.1
0.6 ± 0.1
P
1
±0.1
1.0
1.3
P
2
±0.1
0.5
0.65
b (ref.)
(0.15)
FEATURES
■
■
■
■
■
■
■
■
■
■
■
4 or 8 bussed resistor elements included in one array, concave terminations
High density, less board space than individual chip resistors
Easier PCB layout because of zigzag termination style
Superior solderability by concave terminals
High self-alignment effect in reflow soldering process
Suitable for image recognition systems due to square corner design
Suitable as pull-up/pull-down resistors for digital circuits
Meets or exceeds IEC 60 115-1, JIS C 5201-1
Rated ambient temperature: + 70° C
Operating temperature range: - 55° C ... + 125° C
Suitable for reflow and wave soldering
CIRCUIT CONSTRUCTION
5
4
9
8
7
6
CNB2E5Z
CNB2B9Z
1
2
3
1
2
3
4
5
RATING
SIZE
1210
2512
TYPE
CNB2E5Z
CNB2B9Z
T.C.R.
(ppm/K)
± 200
POWER RATING*
(per element)
0.063 W
MAX.
WORKING
VOLTAGE
50 V
MAX. OVERLOAD
VOLTAGE
(5 sec. max.)
100 V
RESISTANCE RANGE
(E3)
1 kΩ ... 470 kΩ
RESISTANCE
TOLERANCE
J (± 5%)
* For resistors operated at an ambient temperature of 70°C or above, the power rating shall be derated.
Please note that network resistors generate higher heat rather than single flat chip resistor even under rated power output.
A few cross talks will happen in network resistors. Design the circuit taking the effect by the cross talks into consideration as very low voltage will occur to the resistor elements that don´t pass current
by the voltage drop in common electrode if current flows to the common electrodes.
EUROPE GmbH • Kaddenbusch 6 • D-25578 Dägeling / ITZEHOE • PHONE: +49 (0) 48 21 / 89 89-0 • FAX: +49 (0) 48 21/ 89 89 89 • Internet: www.koaeurope.de
Revision: 5. Nov. 2004
Specifications given herein may be changed at any time without prior notice.
Please confirm technical specifications before you order and/or use.
FPGA/CPLD
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