DEMO MANUAL DC1747A
LTM2882:
Dual Isolated RS232
µModule Transceiver + Power
DESCRIPTION
Demonstration circuit 1747A is a dual isolated RS232
μModule
®
transceiver with integrated power featuring
the LTM
®
2882. The demo circuit provides a 2-chan-
nel, 2500V
RMS
, galvanically isolated RS232 transceiver
interface. The demo circuit features an EMI optimized
circuit configuration and printed circuit board layout. All
components are integrated into the μModule transceiver.
The demo circuit operates from a single external supply
on V
CC
. The part generates the output voltage V
CC2
and
communicates all necessary signaling across the isola-
tion barrier using Linear Technology’s isolator μModule
technology.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology, the Linear logo and μModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
PERFORMANCE SUMMARY
SYMBOL
V
CC
V
CC2
f
MAX
PARAMETER
Input Supply Range
Output Voltage
Maximum Data Rate
(T
A
= 25°C)
CONDITIONS
LTM2882−5
LTM2882−3
LTM2882-5 I
LOAD
= 150mA
LTM2882-3 I
LOAD
= 100mA
R
L
= 3k, C
L
= 2.5nF
R
L
= 3k, C
L
= 1nF
R
L
= 3k, C
L
= 250pF
GND to GND2
MIN
4.5
3.0
4.7
4.7
100
250
1000
560
400
30
TYP
5
3
5
5
MAX
5.5
3.6
UNITS
V
V
V
V
kbps
kbps
kbps
V
DC
V
RMS
kV/μs
V
IORM
Maximum Working Insulation Voltage
Common Mode Transient Immunity
OPERATING PRINCIPLES
The LTM2882 contains an isolated DC/DC converter de-
livering power to V
CC2
at 5V from the input supply V
CC
.
Isolation is maintained by the separation of GND and GND2
where significant operating voltages and transients can
exist without affecting the operation of the LTM2882. The
logic side ON pin enables or shuts down the LTM2882.
RS232 signaling is controlled by the logic inputs T1IN,
T2IN and DE. Connection to the transceiver pins, R1IN-
T1OUT or R2IN-T2OUT, permits RS232 communication on
the isolated side of the demo circuit. The circuit features
two channels, supporting multiple RS232 channels or
the addition of flow control on a single RS232 interface.
The spare logic channel, DIN to DOUT, is configured to
control the state of the driver outputs, T1OUT and T2OUT,
by connecting DOUT to DE.
Data is transmitted out the driver pins T1OUT and T2OUT
from the inputs T1IN and T2IN with the input DE set to
ON. Data is received through the receiver pins R1IN and
R2IN to the outputs R1OUT and R2OUT; receivers are
always active.
The demo circuit has been designed and optimized for low
RF emissions. To this end, some features of the LTM2882
are not available for evaluation on the demo circuit.
dc1747af
1
DEMO MANUAL DC1747A
OPERATING PRINCIPLES
The logic supply voltage V
L
is tied to V
CC
on the demo
circuit. The ON pin and the spare logic channel DIN to
DOUT, connected to DE, are selectable by jumper pro-
gramming only.
EMI mitigation techniques used include the following:
1. Four layer PCB, allowing for isolated side to logic side
“bridge” capacitor. The bridge capacitor is formed be-
tween an inner layer of floating copper which overlaps
the logic side and isolated side ground planes. This
structure creates two series capacitors, each with ap-
proximately 0.008" of insulation, supporting the full
dielectric withstand rating of 2500V
RMS
. The bridge
capacitor provides a low impedance return path for
injected currents due to parasitic capacitances of the
LTM2882’s signal and power isolating elements.
2. Discrete bridge capacitors (C3, C4) mounted between
GND2 and GND. The discrete capacitors provide ad-
ditional attenuation at frequencies below 400MHz.
Capacitors are safety rated type Y2, manufactured by
Murata, part #GA342QR7GF471KW01L.
3. Minimized board/ground plane size. This reduces the
dipole antenna formed between the logic side and
isolated side ground planes.
4. Optimized top signal routing and ground floods to reduce
signal loops, minimizing differential mode radiation.
5. Common mode filtering integrated into the input pin
header and output DB9 connector. Filtering helps to
reduce emissions caused by conducted noise and
minimizes the effects of cabling to common mode
emissions.
6. A combination of low ESL and high ESR decoupling.
A low ESL ceramic capacitor is located close to the
module minimizing high frequency noise conduction.
High ESR tantalum capacitors are included to minimize
board resonances and prevent voltage spikes due to hot
plugging of the input supply voltage.
EMI performance is shown in Figure 1, measured using
a Gigahertz Transverse Electromagnetic (GTEM) cell and
method detailed in IEC 61000-4-20, “Testing and Mea-
surement Techniques – Emission and Immunity Testing
in Transverse Electromagnetic Waveguides.”
60
DETECTOR = QuasiPeak, R
BW
= 120kHz,
50 V
BW
= 300kHz, SWEEP TIME = 17s
NUMBER OF POINTS = 501
40
30
dBμV/m
20
10
0
–10
–20
–30
0
1
2
CISPR 22 CLASS B LIMIT
DC1747A-B
DC1747A-A
3 4 5 6 7
FREQUENCY (MHz)
8
9
10
DC1747A F01
Figure 1.DC1747A Radiated Emissions
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DEMO MANUAL DC1747A
QUICK START PROCEDURE
Demonstration Circuit 1747A is easy to set up and evalu-
ate the performance of the LTM2882. Refer to Figure 2
for proper measurement equipment setup and follow the
procedure below.
NOTE: Use a short ground lead on the oscilloscope probe
when measuring input or output voltage ripple and high
speed signals.
1. Install JP1 and JP2 in the ON position.
2. Connect jumper T1I to R1O and T2I to R2O on pin
header J1.
3. With power off, connect the input power supply to V
CC
and GND on pin header J1.
4. Turn on the power at the input.
NOTE: Make sure that the input voltage does not
exceed 6V.
5. Check for the proper output voltage. V
CC2
= 5V. This
can be measured between probe point V2 to G2.
6. Once the proper output voltages are established, con-
nect a standard 9-Pin RS232 cable between J2 on the
demo board and a computer.
7. Launch any program with the ability to send, receive, and
monitor RS232 characters or data, including the ability
to control the communication handshaking. Realterm
is a free, powerful, terminal program which can easily
be used for the above purposes. Signals may be veri-
fied with the use of an oscilloscope connected to any
of the appropriate signals on pin header J1or isolated
side probe points located next to the DB9 connector.
Figure 2. Demo Board Setup
dc1747af
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DEMO MANUAL DC1747A
PCB LAYOUT
Layer 1. Top Layer
Layer 2. Ground Plane
Layer 3. Signal Layer
Layer 4. Bottom Layer
PARTS LIST
ITEM
1
QTY
1
REFERENCE
U1
DESCRIPTION
I.C., LTM2882CY-3
I.C., LTM2882CY-5
Hardware/Components (For Demo Board Only)
2
3
4
5
6
7
8
9
2
1
2
1
1
1
2
2
C1, C5
C2
C3, C4
J1
J1
J2
JP1, JP2
JP1, JP2
CAP TANT 10F 10V 20% TAJA
,
CAP CER 1F 10V 20% 0508
,
CAP CER 470pF 250V
AC
10% 1808
,
0.1" DOUBLE ROW HEADER, 5
×
2 PIN
0.1" FERRITE PLATE, 5
×
2 HOLE
CON, FILTERED, DSUB 9-PIN
2mm SINGLE ROW HEADER, 3-PIN
SHUNT
AVX TAJA106M010RNJ
MURATA LLL219R71A105MA01L
MURATA GA342QR7GF471KW01L
SAMTEC TSW-105-22-G-D
FAIR RITE 2644247101
KOBICONN 152-3609
SAMTEC TMM-103-02-L-S
SAMTEC 2SN-BK-G
MANUFACTURER/PART NUMBER
LINEAR TECHNOLOGY LTM2882CY-3#PBF
LINEAR TECHNOLOGY LTM2882CY-5#PBF
Required Circuit Components
dc1747af
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DEMO MANUAL DC1747A
SCHEMATIC DIAGRAM
dc1747af
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