Product Specification
PE43601
Product Description
The PE43601 is a HaRP™-enhanced, high linearity, 6-bit RF
Digital Step Attenuator (DSA). This highly versatile DSA
covers a 15.75 dB attenuation range in 0.25 dB steps. The
Peregrine 50Ω RF DSA provides a serial-addressable CMOS
control interface. It maintains high attenuation accuracy over
frequency and temperature and exhibits very low insertion loss
and low power consumption. Performance does not change
with Vdd due to on-board regulator. This next generation
Peregrine DSA is available in a 5x5 mm 32-lead QFN footprint.
The PE43601 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
50
Ω
RF Digital Attenuator
6-bit, 15.75 dB, DC-6.0 GHz
Features
•
HaRP™-enhanced UltraCMOS™ device
•
Attenuation: 0.25 dB steps to 15.75 dB
•
High Linearity: Typical +58 dBm IP3
Excellent low-frequency performance
•
3.3 V or 5.0 V Power Supply Voltage
•
Fast switch settling time
•
Programming Modes:
•
•
•
•
•
Direct Parallel
Latched Parallel
Serial-Addressable: Program up to
eight addresses 000 - 111
Figure 1. Package Type
32-lead 5x5x0.85 mm QFN Package
Serial Two-Byte Protocol: Address and
Data Word
•
High-attenuation state @ power-up (PUP)
•
CMOS Compatible
•
No DC blocking capacitors required
•
Packaged in a 32-lead 5x5x0.85 mm QFN
Figure 2. Functional Schematic Diagram
Switched Attenuator Array
RF Input
RF Output
Parallel Control
Serial In
6
Control Logic Interface
CLK
LE
A0
A1
A2
P/S
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 13
Document No. 70-0253-03
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PE43601
Product Specification
Table 1. Electrical Specifications @ +25°C, V
DD
= 3.3 V or 5.0 V
Parameter
Frequency Range
Attenuation Range
Insertion Loss
Attenuation Error
Return Loss
Relative Phase
P1dB
IIP3
Typical Spurious Value
Video Feed Through
Switching Time
RF Trise/Tfall
Settling Time
50% CTRL to 10% / 90% RF
10% / 90% RF
RF settled to within 0.05 dB of final value
RBW = 5 MHz, Averaging ON.
All States
Input
Two tones at +18 dBm, 20 MHz spacing
0 dB - 15.75 dB Attenuation settings
0 dB - 15.75 dB Attenuation settings
0.25 dB Step
DC
≤
6 GHz
DC < 4 GHz
4 GHz
≤
6 GHz
DC - 6 GHz
DC - 6 GHz
20 MHz - 6 GHz
20 MHz - 6 GHz
1 MHz
30
18
20
32
57
-110
10
650
400
4
Test Conditions
Frequency
Min
Typical
DC – 6
0 – 15.75
2.3
Max
Units
GHz
dB
2.8
±(0.2
+ 4%)
±(0.4 + 8%)
dB
dB
dB
dB
deg
dBm
dBm
dBm
mVpp
ns
ns
µs
Performance Plots
Figure 3. 0.25 dB Step Error vs. Frequency*
200 MHz
2200 MHz
0.8
0.7
0.6
Step Error (dB.)
0.5
0.4
0.3
0.2
0.1
0.0
0
2
4
6
8
10
12
14
16
Attenuation Setting (dB.)
900 MHz
3000 MHz
1800 MHz
5400 MHz
Figure 4. 0.25dB Attenuation vs. Attenuation
State
Attenuation
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
2
900 MHz
2200 MHz
3800 MHz
5800 MHz
Attenuation
(dB)
dB
3
4
5
6
7
8
9 10 11 12 13 14 15 16
*Monotonicity is held so long as step-error does not cross zero.
Attenuation State
Figure 5. 0.25 dB Major State Bit Error
0.25dB State
4dB State
2.0
1.5
Figure 6. 0.25 dB Attenuation Error vs. Frequency
2dB State
0.5 dB State
8dB State
1dB State
15.75dB State
200 MHz
1.5
1.0
Attenuation Error (dB.)
900 MHz
4000 MHz
1800 MHz
6000 MHz
2200 MHZ
3000 MHz
1.0
Bit Error (dB.)
0.5
0.0
-0.5
-1.0
-1.5
-2.0
0.0
1.0
2.0
3.0
4.0
Frequency (GHz)
5.0
6.0
7.0
8.0
0.5
0.0
-0.5
-1.0
-1.5
0
2
4
6
8
10
12
14
16
Attenuation Setting (dB.)
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 13
Document No. 70-0253-03
│
UltraCMOS™ RFIC Solutions
PE43601
Product Specification
Figure 7. Insertion Loss vs. Temperature
-40C
0
-0.5
-1
Insertion Loss (dBm.)
-1.5
-2
-2.5
-3
-3.5
-4
-4.5
-5
0.0
1.0
2.0
3.0
4.0
5.0
Frequency (GHz)
6.0
7.0
8.0
9.0
Figure 8. Input Return Loss vs. Attenuation:
T = +25C
0dB
0
-10
-20
Return Loss (dB.)
-30
-40
-50
-60
-70
0
1
2
3
4
5
6
7
8
9
Frequency (GHz.)
2dB
0.25dB
4dB
0.5dB
8dB
1dB
15.75dB
+25C
+85C
Figure 9. Output Return Loss vs. Attenuation:
T = +25C
0dB
0
-10
-20
-30
-40
-50
-60
0
1
2
3
4
5
6
7
8
9
Frequency (GHz.)
2dB
0.25dB
4dB
0.5dB
8dB
1dB
15.75dB
Figure 10. Input Return Loss vs. Temperature:
15.75 dB State
-40C
0
-10
Return Loss (dB.)
-20
-30
-40
-50
-60
-70
0
1
2
3
4
5
6
7
8
9
Frequency (GHz.)
25C
85C
Return Loss (dB.)
Figure 11. Output Return Loss vs. Temperature:
15.75 dB State
0
-5
-10
Return Loss (dB.)
-15
-20
-25
-30
-35
-40
-45
-50
0
1
2
3
4
5
6
7
8
9
Frequency (GHz.)
-40C
25C
85C
Figure 12. Relative Phase vs. Frequency
0dB
2dB
0.25dB
4dB
0.5dB
8dB
1dB
15.75dB
40
35
Relative Phase Error (Deg.)
30
25
20
15
10
5
0
0
1
2
3
4
Frequency (GHz.)
5
6
7
8
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©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 13
PE43601
Product Specification
Figure 13. Relative Phase vs. Temperature:
15.75 dB State
900 MHz
10.00
9.00
8.00
7.00
Phase (deg.)
6.00
5.00
4.00
3.00
2.00
1.00
0.00
-40
-20
0
20
40
Temperature (Deg. C.)
60
80
1800 MHz
3000 MHz
Figure 14. Attenuation Error vs. Attenuation
Setting: 900 MHz
900 MHz @ T=+25 C
0.500
900 MHz @ T= -40C
900 MHz @ T= +85C
0.300
Attenuation Error (dB.)
0.100
-0.100
-0.300
-0.500
0.0
4.0
8.0
Attenuation Se tting (dB.)
12.0
16.0
Figure 15. Attenuation Error vs. Attenuation
Setting: 1800 MHz
1800 MHz @ T= +25C
0.500
Figure 16. Attenuation Error vs. Attenuation
Setting: 3000 MHz
3000 MHz @ T= +25C
0.500
1800 MHz @ T= -40C
1800 MHz @ T= +85C
3000 MHz @ T= -40C
3000 MHz @ T= +85C
0.300
0.300
Attenuation Error (dB.)
0.0
4.0
8.0
Attenuation Se tting (dB.)
12.0
16.0
Attenuation Error (dB.)
0.100
0.100
-0.100
-0.100
-0.300
-0.300
-0.500
-0.500
0.0
4.0
8.0
Attenuation Setting (dB.)
12.0
16.0
Figure 17. Input IP3 vs. Frequency
0dB
70
65
60
0.25dB
4dB
0.5dB
8dB
1dB
2dB
Input IP3 (dBm.)
55
50
45
40
35
30
0
1000
2000
3000
4000
5000
6000
7000
Frequency (M Hz.)
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 13
Document No. 70-0253-03
│
UltraCMOS™ RFIC Solutions
PE43601
Product Specification
Figure 18. Pin Configuration (Top View)
C0.25
GND
C0.5
C1
C2
C4
C8
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
32
31
30
29
28
27
26
NC
V
DD
P/S
A0
GND
GND
RF1
GND
SI
25
24
23
22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CLK
LE
A1
A2
GND
GND
RF2
GND
Exposed
Solder pad
21
20
19
18
17
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE43601 in
the 32-lead 5x5 QFN package is MSL1.
GND
GND
GND
GND
GND
GND
GND
GND
Switching Frequency
The PE43601 has a maximum 25 kHz switching rate.
Switching rate is defined to be the speed at which the
DSA can be toggled across attenuation states.
Description
Table 2. Pin Descriptions
Pin No.
1
2
3
4
5, 6, 8 - 17,
19, 20, 26
7
18
21
22
23
24
25
27
28
29
30
31
32
Paddle
Pin Name
N/C
V
DD
P/S
A0
GND
RF1
RF2
A2
A1
LE
CLK
SI
C8
C4
C2
C1
C0.5
C0.25
GND
No Connect
Power supply pin
Serial/Parallel mode select
A0 connection
Ground
RF1 port
RF2 port
A2 connection
A1 connection
Latch Enable input
Serial interface clock input
Serial Interface input
Attenuation control bit, 8 dB
1
Attenuation control bit, 4 dB
1
Attenuation control bit, 2 dB
1
Attenuation control bit, 1 dB
1
Attenuation control bit, 0.5 dB
1
Attenuation control bit, 0.25 dB
1
Ground for proper operation
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the package
must be grounded for proper device operation.
Note: 1. Ground C0.25, C0.5, C1 C2, C4, C8, C16 if not in use.
Document No. 70-0253-03
│
www.psemi.com
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 13
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