Product data sheet
Industrial
CompactFlash
TM
Card
C-440 Series
up to UDMA6 / MDMA4 / PIO6
B U:
Fl a sh Pr od u ct s
Date :
Se pte mbe r 25 , 2 01 3
Re vi si o n: 1 . 22
Fi le :
C - 44 0_ da ta_ s he e t_ C F - H x B U_Re v 1 2 2 .d oc
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Switzerland
Swissbit reserves the right to change products or specifications without notice.
www.swissbit.com
industrial@swissbit.com
Revision: 1.22
C-440_data_sheet_CF-HxBU_Rev122.doc
Page
1 of 105
C-440 Series – Industrial UDMA CompactFlash™ Card,
2GByte up to 64GByte, 3.3/5V Supply
1 Main Features
Highly-integrated memory controller
o
CompactFlash
TM
specification 4.1,
compatible with specification 5.0
o
PCMCIA specification 2.1 (chapter CF-ATA Registers) &
PC Card ATA Interface Specification 8, 7, 6, and 5
o
True IDE mode compatible,
up to UDMA6 / MDMA4 / PIO6 supported
o
Fix drive (IDE mode) & removable drive (PC card mode)
as default in the same card
o
Hot swappable in PC card modes
o
Signal termination resistors to improve signal quality
o
LBA48 address support (LBA28 limitation on request)
o
Fix drive (IDE mode) &
removable drive (PC card mode) as default configuration
Small form factor
o
CFC Type I: 36.4mm x 42.8mm x 3.3mm
Low-power CMOS technology
3.3V or 5.0V power supply, card drives bus with 3.3V, inputs 5V compatible
Power saving mode (with automatic wake-up)
S.M.A.R.T. support and extended vendor information
Wear Leveling: equal wear leveling of static and dynamic data
The wear leveling assures that dynamic data as well as static data is balanced evenly across the
memory. With that the maximum write endurance of the device is guaranteed.
Data Retention: 10 year (JESD47)
Patented power-off reliability
o
No data loss of older sectors
o
Max. 32 sectors data loss (old data kept)
High reliability
o
MTBF >3,000,000 hours
o
Data reliability: < 1 non-recoverable error per 10
14
bits read
o
Number of connector insertions/removals: >10,000
o
24bit per double sector ECC capability
o
Near Miss ECC handling at read (refresh and correct data, if multiple correctable errors
detected)
o
Read Disturb Management (RDM, refresh and correct data after a certain number of read
commands per block)
High performance
o
Up to 133MB/s burst transfer rate in UDMA6
o
Sustained Write performance: up to 40MB/s (UDMA6 untrimmed)
o
Sustained Read Performance: up to 65MB/s (UDMA6)
o
Trim command supported to increase random write performance
o
Up to 300 IOPS with Trim Support (4k random write) and up to 32 IOPS untrimmed
Available densities
o
up to 64GBytes (SLC NAND Flash)
Operating System support
o
Standard Software Drivers operation CompactFlash
TM
2 Temperature ranges
o
Commercial Temperature range
0 … +70°C
o
Industrial Temperature range
-40 … +85°C
Life Cycle Management
Controlled BOM
RoHS compatible
Swissbit reserves the right to change products or specifications without notice.
www.swissbit.com
industrial@swissbit.com
Revision: 1.22
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Switzerland
C-440_data_sheet_CF-HxBU_Rev122.doc
Page
2 of 105
2 Table of Contents
1
2
3
MAIN FEATURES
..................................................................................................................................................................... 2
TABLE OF CONTENTS
............................................................................................................................................................... 3
ORDER INFORMATION.............................................................................................................................................................
6
3.1 S
TANDARD PART NUMBERS
............................................................................................................................................................... 6
3.2 S
UPPORTED
F
EATURES
.................................................................................................................................................................... 6
3.3 O
FFERED
OEM
OPTIONS ON REQUEST
................................................................................................................................................ 6
4
PRODUCT SPECIFICATION
........................................................................................................................................................ 7
4.1 S
YSTEM
P
ERFORMANCE
................................................................................................................................................................... 7
4.2 E
NVIRONMENTAL
S
PECIFICATIONS
...................................................................................................................................................... 8
4.3 P
HYSICAL
D
IMENSIONS
................................................................................................................................................................... 9
4.4 R
ELIABILITY
................................................................................................................................................................................. 9
4.5 D
RIVE
G
EOMETRY
/ CHS P
ARAMETER
............................................................................................................................................... 9
4.6 P
HYSICAL DESCRIPTION
................................................................................................................................................................ 10
5
ELECTRICAL INTERFACE
......................................................................................................................................................... 11
5.1 E
LECTRICAL DESCRIPTION
............................................................................................................................................................... 11
5.2 E
LECTRICAL
S
PECIFICATION
............................................................................................................................................................. 16
5.3 A
DDITIONAL REQUIREMENTS FOR
C
OMPACT
F
LASH
TM
A
DVANCED
T
IMING MODE
.......................................................................................... 17
6
COMMAND INTERFACE
.......................................................................................................................................................... 18
6.1 A
TTRIBUTE
M
EMORY
R
EAD AND
W
RITE
............................................................................................................................................ 18
6.2 C
OMMON
M
EMORY
R
EAD AND
W
RITE
............................................................................................................................................. 19
6.3 I/O R
EAD AND
W
RITE
.................................................................................................................................................................. 21
6.4 T
RUE
IDE M
ODE
........................................................................................................................................................................ 22
6.5 U
LTRA
DMA M
ODE
.................................................................................................................................................................... 24
7
CARD CONFIGURATION
......................................................................................................................................................... 43
7.1 C
ONFIGURATION
O
PTION
R
EGISTER
(200
H IN
A
TTRIBUTE
M
EMORY
)
....................................................................................................... 43
7.2 C
OMPACT
F
LASH
TM
M
EMORY
C
ARD
C
ONFIGURATIONS
............................................................................................................................ 44
7.3 P
IN
R
EPLACEMENT
R
EGISTER
(204
H IN
A
TTRIBUTE
M
EMORY
)
.............................................................................................................. 44
7.4 A
TTRIBUTE
M
EMORY
F
UNCTION
...................................................................................................................................................... 45
7.5 I/O T
RANSFER
F
UNCTION
.............................................................................................................................................................. 46
7.6 C
OMMON
M
EMORY
T
RANSFER
F
UNCTION
.......................................................................................................................................... 46
7.7 T
RUE
IDE M
ODE
I/O F
UNCTION
...................................................................................................................................................... 46
7.8 H
OST
C
ONFIGURATION
R
EQUIREMENTS FOR
M
ASTER
/S
LAVE OR
N
EW
T
IMING
M
ODES
................................................................................ 47
8
SOFTWARE INTERFACE
.......................................................................................................................................................... 48
8.1 CF-ATA D
RIVE
R
EGISTER
S
ET
D
EFINITION AND
P
ROTOCOL
................................................................................................................... 48
8.2 M
EMORY
M
APPED
A
DDRESSING
.................................................................................................................................................... 48
8.3 C
ONTIGUOUS
I/O M
APPED
A
DDRESSING
.......................................................................................................................................... 49
8.4 I/O P
RIMARY AND
S
ECONDARY
A
DDRESS
C
ONFIGURATIONS
................................................................................................................. 50
8.5 T
RUE
IDE M
ODE
A
DDRESSING
...................................................................................................................................................... 50
9
CF-ATA REGISTERS
............................................................................................................................................................... 51
9.1 D
ATA
R
EGISTER
........................................................................................................................................................................... 51
9.2 E
RROR
R
EGISTER
........................................................................................................................................................................ 51
9.3 F
EATURE
R
EGISTER
...................................................................................................................................................................... 52
9.4 S
ECTOR
C
OUNT
R
EGISTER
.............................................................................................................................................................. 52
9.5 S
ECTOR
N
UMBER
(LBA 7:0) R
EGISTER
........................................................................................................................................... 52
9.6 C
YLINDER
L
OW
(LBA 15:8) R
EGISTER
............................................................................................................................................ 52
9.7 C
YLINDER
H
IGH
(LBA 23:16) R
EGISTER
......................................................................................................................................... 52
9.8 D
RIVE
/H
EAD
(LBA 27:24) R
EGISTER
............................................................................................................................................. 53
9.9 S
TATUS
& A
LTERNATE
S
TATUS
R
EGISTERS
........................................................................................................................................ 54
9.10 D
EVICE
C
ONTROL
R
EGISTER
......................................................................................................................................................... 54
9.11 C
ARD
(D
RIVE
) A
DDRESS
R
EGISTER
................................................................................................................................................. 55
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Switzerland
Swissbit reserves the right to change products or specifications without notice.
www.swissbit.com
industrial@swissbit.com
Revision: 1.22
C-440_data_sheet_CF-HxBU_Rev122.doc
Page
3 of 105
10
CF-ATA COMMAND DESCRIPTION
......................................................................................................................................... 56
10.1 C
HECK
P
OWER
M
ODE
(98
H OR
E5
H
)
............................................................................................................................................ 58
10.2 D
ATA
S
ET
M
ANAGEMENT
(06
H
) TRIM
.......................................................................................................................................... 58
10.3 E
RASE
S
ECTOR
(
S
) (C0
H
)
............................................................................................................................................................. 58
10.4 E
XECUTE
D
RIVE
D
IAGNOSTIC
(90
H
)
.............................................................................................................................................. 58
10.5 F
LUSH
C
ACHE
(E7
H
)
.................................................................................................................................................................. 59
10.6 F
LUSH
C
ACHE
E
XT
(EA
H
) 48
BIT
LBA............................................................................................................................................
59
10.7 F
ORMAT TRACK
(50
H
)
................................................................................................................................................................ 60
10.8 I
DENTIFY
D
EVICE
(EC
H
)
.............................................................................................................................................................. 60
10.9 I
DLE
(97
H OR
E3
H
)
................................................................................................................................................................... 70
10.10 I
DLE
I
MMEDIATE
(95
H OR
E1
H
)
.................................................................................................................................................. 70
10.11 I
NITIALIZE
D
RIVE
P
ARAMETERS
(91
H
)
........................................................................................................................................... 70
10.12 NOP (00
H
)
........................................................................................................................................................................... 71
10.13 R
EAD
B
UFFER
(E4
H
)
................................................................................................................................................................ 71
10.14 R
EAD
DMA (C8
H
)
................................................................................................................................................................... 71
10.15 R
EAD
DMA E
XT
(25
H
) 48
BIT
LBA
............................................................................................................................................. 72
10.16 R
EAD
M
ULTIPLE
(C4
H
)
............................................................................................................................................................. 72
10.17 R
EAD
M
ULTIPLE
E
XT
(29
H
) 48
BIT
LBA
....................................................................................................................................... 73
10.18 R
EAD
S
ECTOR
(
S
) (20
H OR
21
H
)
.................................................................................................................................................. 74
10.19 R
EAD
S
ECTORS
E
XT
(24
H
) 48
BIT
LBA
......................................................................................................................................... 74
10.20 R
EAD
V
ERIFY
S
ECTOR
(
S
) (40
H
)..................................................................................................................................................
74
10.21 R
EAD
V
ERIFY
E
XT
(42
H
) 48
BIT
LBA
........................................................................................................................................... 75
10.22 R
ECALIBRATE
(1X
H
)
.................................................................................................................................................................. 75
10.23 R
EQUEST
S
ENSE
(03
H
)
............................................................................................................................................................. 75
10.24 S
EEK
(7X
H
)
............................................................................................................................................................................ 76
10.25 S
ECURITY
D
ISABLE
P
ASSWORD
(F6
H
)
.......................................................................................................................................... 76
10.26 S
ECURITY
E
RASE
P
REPARE
(F3
H
)
................................................................................................................................................ 77
10.27 S
ECURITY
E
RASE
U
NIT
(F4
H
)
...................................................................................................................................................... 77
10.28 S
ECURITY
F
REEZE
L
OCK
(F5
H
)
.................................................................................................................................................... 77
10.29 S
ECURITY
S
ET
P
ASSWORD
(F1
H
)
................................................................................................................................................. 77
10.30 S
ECURITY
U
NLOCK
(F2
H
)
.......................................................................................................................................................... 78
10.31 S
ET
F
EATURES
(EF
H
)
................................................................................................................................................................ 79
10.32 S
ET
M
ULTIPLE
M
ODE
(C6
H
)
...................................................................................................................................................... 80
10.33 S
ET
S
LEEP
M
ODE
(99
H OR
E6)
................................................................................................................................................. 81
10.34 S.M.A.R.T. (B0
H
)
................................................................................................................................................................ 81
10.35 S
TANDBY
(96
H OR
E2)
............................................................................................................................................................ 82
10.36 S
TANDBY
I
MMEDIATE
(94
H OR
E0
H
)
.......................................................................................................................................... 82
10.37 T
RANSLATE
S
ECTOR
(87
H
)..........................................................................................................................................................
82
10.38 W
RITE
B
UFFER
(E8
H
)
............................................................................................................................................................. 83
10.39 W
RITE
DMA (CA
H
)
................................................................................................................................................................. 83
10.40 W
RITE
DMA E
XT
(35
H
) 48
BIT
LBA
.......................................................................................................................................... 83
10.41 W
RITE
M
ULTIPLE
C
OMMAND
(C5
H
)
............................................................................................................................................. 84
10.42 W
RITE
M
ULTIPLE
E
XT
(39
H
) 48
BIT
LBA
..................................................................................................................................... 84
10.43 W
RITE
M
ULTIPLE WITHOUT
E
RASE
(CD
H
)
..................................................................................................................................... 85
10.44 W
RITE
S
ECTOR
(
S
) (30
H OR
31
H
)
................................................................................................................................................ 85
10.45 W
RITE
S
ECTOR
(
S
) E
XT
(34
H
) 48
BIT
LBA
.................................................................................................................................... 86
10.46 W
RITE
S
ECTOR
(
S
)
WITHOUT
E
RASE
(38
H
)
.................................................................................................................................... 86
10.47 W
RITE
V
ERIFY
(3C
H
)
................................................................................................................................................................ 86
11
S.M.A.R.T FUNCTIONALITY
................................................................................................................................................... 87
11.1 S.M.A.R.T. E
NABLE
/ D
ISABLE OPERATIONS
................................................................................................................................... 87
11.2 S.M.A.R.T. E
NABLE
/ D
ISABLE
A
TTRIBUTE
A
UTOSAVE
...................................................................................................................... 87
11.3 S.M.A.R.T. R
EAD DATA
............................................................................................................................................................. 87
11.4 S.M.A.R.T. R
EAD
A
TTRIBUTE
T
HRESHOLDS
.................................................................................................................................... 92
11.5 S.M.A.R.T. R
ETURN
S
TATUS
....................................................................................................................................................... 93
12
13
14
15
CIS INFORMATION (TYPICAL)
................................................................................................................................................. 94
PACKAGE MECHANICAL
......................................................................................................................................................... 98
DECLARATION OF CONFORMITY.............................................................................................................................................
99
ROHS AND WEEE UPDATE FROM SWISSBIT
........................................................................................................................ 100
Swissbit reserves the right to change products or specifications without notice.
www.swissbit.com
industrial@swissbit.com
Revision: 1.22
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Switzerland
C-440_data_sheet_CF-HxBU_Rev122.doc
Page
4 of 105
16
PART NUMBER DECODER
.................................................................................................................................................... 102
16.1 M
ANUFACTURER
....................................................................................................................................................................... 102
16.2 M
EMORY
T
YPE
........................................................................................................................................................................ 102
16.3 P
RODUCT
T
YPE
........................................................................................................................................................................ 102
16.4 D
ENSITY
................................................................................................................................................................................ 102
16.5 P
LATFORM
............................................................................................................................................................................. 102
16.6 P
RODUCT
G
ENERATION
............................................................................................................................................................. 102
16.7 M
EMORY
O
RGANIZATION
........................................................................................................................................................... 102
16.8 C
ONTROLLER TYPE
.................................................................................................................................................................... 102
16.9 N
UMBER OF
F
LASH
C
HIP
.......................................................................................................................................................... 102
16.10 F
LASH
C
ODE
......................................................................................................................................................................... 102
16.11 T
EMP
. O
PTION
....................................................................................................................................................................... 103
16.12 DIE C
LASSIFICATION
................................................................................................................................................................ 103
16.13 PIN M
ODE
........................................................................................................................................................................... 103
16.14 C
OMPACT
F
LASH
XYZ
.............................................................................................................................................................. 103
16.15 O
PTION
................................................................................................................................................................................ 103
17
SWISSBIT CF LABEL SPECIFICATION
.................................................................................................................................... 104
17.1 F
RONT SIDE LABEL
..................................................................................................................................................................... 104
17.2 B
ACK SIDE LABEL
...................................................................................................................................................................... 104
18
REVISION HISTORY
.............................................................................................................................................................. 105
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Switzerland
Swissbit reserves the right to change products or specifications without notice.
www.swissbit.com
industrial@swissbit.com
Revision: 1.22
C-440_data_sheet_CF-HxBU_Rev122.doc
Page
5 of 105