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LY62W64PL-55LLI

产品描述SRAM,
产品类别存储    存储   
文件大小225KB,共13页
制造商Lyontek
官网地址http://www.lyontek.com.tw/index.html
下载文档 详细参数 全文预览

LY62W64PL-55LLI概述

SRAM,

LY62W64PL-55LLI规格参数

参数名称属性值
Objectid107242956
包装说明,
Reach Compliance Codecompliant
ECCN代码EAR99
YTEOL0

LY62W64PL-55LLI文档预览

®
LY62W64
Rev. 1.2
8K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Description
Initial Issue
Merge 2.7~3.6V and 4.5~5.5V to 2.7~5.5V
Revised
STSOP Package Outline Dimension
Issue Date
Dec.21.2004
Jan.17.2005
Mar.26.2008
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
0
®
LY62W64
Rev. 1.2
8K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The LY62W64 is a 65,536-bit low power CMOS
static random access memory organized as 8,192
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY62W64 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The LY62W64 operates with wide range power
supply and all inputs and outputs are fully TTL
compatible
FEATURES
Fast access time : 35/55/70ns
Low power consumption:
Operation current :
20/15/10mA (TYP.), V
CC
= 3.0V
Standby current :
1μA (TYP.), V
CC
= 3.0V
Wide range power supply : 2.7 ~ 5.5V
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 2.0V (MIN.)
Lead free and green package available
Package : 28-pin 600 mil PDIP
28-pin 330 mil SOP
28-pin 8mm x 13.4mm STSOP
PRODUCT FAMILY
Product Family
LY62W64
LY62W64(E)
LY62W64(I)
Operating Temperature
0 ~ 70℃
-20 ~ 80℃
-40 ~ 85℃
Vcc Range
2.7 ~ 5.5V
2.7 ~ 5.5V
2.7 ~ 5.5V
Speed
35/55/70ns
35/55/70ns
35/55/70ns
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Vcc
Vss
A0 - A12
DQ0 – DQ7
DECODER
8Kx8
MEMORY ARRAY
CE#, CE2
WE#
OE#
V
CC
V
SS
NC
A0-A12
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
1
®
LY62W64
Rev. 1.2
8K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PDIP/SOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE#
CE2
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
OE#
A11
A9
A8
CE2
WE#
Vcc
NC
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A1
A2
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
SYMBOL
V
TERM
T
A
T
STG
P
D
I
OUT
T
SOLDER
RATING
-0.5 to 7.0
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
260
UNIT
V
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
LY62W64
LY62W64
STSOP
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
X
L
L
L
CE2
X
L
H
H
H
OE#
X
X
H
L
X
WE#
X
X
H
H
L
I/O OPERATION
High-Z
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB1
I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2
®
LY62W64
Rev. 1.2
8K X 8 BIT LOW POWER CMOS SRAM
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
MIN.
PARAMETER
Supply Voltage
V
CC
2.7
*1
Input High Voltage
V
IH
0.7*Vcc
*2
Input Low Voltage
V
IL
- 0.5
V
CC
V
IN
V
SS
Input Leakage Current
I
LI
-1
Output Leakage
V
CC
V
OUT
V
SS,
I
LO
-1
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -1mA
2.4
Output Low Voltage
V
OL
I
OL
= 2mA
-
- 35
-
Cycle time = Min.
CE# = V
IL
and CE2 = V
IH
, - 55
I
CC
-
I
I/O
= 0mA
- 70
-
Average Operating
Cycle time = 1µs
Power supply Current
CE#
0.2V and CE2
V
CC
-0.2V,
I
CC1
-
I
I/O
= 0mA
other pins at 0.2V or V
CC
-0.2V
-LL
CE#
V
CC
-0.2V
-
Standby Power
I
SB1
Supply Current
or CE2
0.2V
-LLE/-LLI
-
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. 10µA for special request
5. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
TYP.
3.0
-
-
-
-
3.0
-
20
15
10
3
1
1
*5
MAX.
5.5
V
CC
+0.3
0.6
1
1
-
0.4
50
45
40
10
50
*4
80
*4
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
µA
µA
CAPACITANCE
(T
A
= 25
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 50pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
3
®
LY62W64
Rev. 1.2
8K X 8 BIT LOW POWER CMOS SRAM
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
LY62W64-35
MIN.
MAX.
35
-
-
35
-
35
-
25
10
-
5
-
-
15
-
15
10
-
LY62W64-55
MIN.
MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
10
-
LY62W64-70
MIN.
MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
25
-
25
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
LY62W64-35
MIN.
MAX.
35
-
30
-
30
-
0
-
25
-
0
-
20
-
0
-
5
-
-
15
LY62W64-55
MIN.
MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
20
LY62W64-70
MIN.
MAX.
70
-
60
-
60
-
0
-
55
-
0
-
30
-
0
-
5
-
-
25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
40 Hsuch-Fu Rd., Hsinchu, Taiwan.
TEL: 886-3-5165511
FAX: 886-3-5165522
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
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