Product Specification
PE4280
Product Description
The PE4280 is an UltraCMOS™ Switch designed for CATV
applications, covering a broad frequency range from DC up to
2.2 GHz. This single-supply SPDT switch integrates a two-pin
CMOS control interface. It also provides low insertion loss with
extremely low bias requirements while operating on a single 3 V
supply. In a typical CATV application, the PE4280 provides for a
cost effective and manufacturable solution when compared to
mechanical relays.
The PE4280 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance of
GaAs with the economy and integration of conventional CMOS.
Figure 1. Functional Diagram
RFC
75
Ω
SPDT CATV UltraCMOS™
Switch 5 MHz - 2.2 GHz
Features
75
Ω
characteristic impedance
Integrated 75
Ω
terminations
CTB performance of 85 dBc
High isolation 60 dB at 1 GHz
Low insertion loss: typically 0.5 dB at
5 MHz, 1.1 dB at 1 GHz
High input IP3: 50 dBm
CMOS two-pin control
Single +3 V supply operation
Low current consumption: 8
μA
Unique all off terminated mode
4 x 4 x 0.85 mm QFN package
Figure 2. Package Type
75
20-lead 4 x 4 x 0.85 mm QFN
RF2
RF1
75
CMOS
Control
Driver
75
C1
C2
Table 1. Electrical Specifications @ +25 °C (Z
S
= Z
L
= 75
Ω)
Parameter
Operating Frequency
5 MHz - 250 MHz
250 MHz - 750 MHz
750 MHz - 1000 MHz
1000 MHz - 2200 MHz
5 MHz - 250 MHz
250 MHz - 750 MHz
750 MHz - 1000 MHz
1000 MHz - 2200 MHz
5 MHz - 1000 MHz
5 MHz - 1000 MHz
1000 MHz
77 and 110 Channels;
Power Out = 44 dBm V
50% CTRL to 10/90% RF
5 MHz - 1000 MHz
50
29
67
60
57
44
Condition
Minimum
5
0.5
0.8
0.9
1.1
72
65
60
47
75
50
26
-85
2
15
Typical
Maximum
2200
0.6
0.95
1.1
1.3
Units
MHz
Insertion Loss
dB
Isolation
dB
Input IP2
1
Input IP3
1
Input 1dB Compression
1
CTB/CSO
Switching Time
Video Feedthrough
2
dBm
dBm
dBm
dBc
µs
mV
pp
Notes: 1. Measured in a 50
Ω
system.
2. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth
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PE4280
Product Specification
Figure 3. Pin Configuration (Top View)
Table 3. Absolute Maximum Ratings
Symbol
V
DD
V
I
P
RF
T
ST
T
OP
V
ESD
Parameter/Condition
Power supply voltage
Voltage on any DC input
RF CW power
Storage temperature
Operating temperature
ESD voltage
(Human Body Model)
-65
-40
Min
-0.3
-0.3
Max
4.0
V
DD
+
0.3
24
150
85
1000
Unit
V
V
dBm
°C
°C
V
Table 2. Pin Descriptions
No.
1
2
3
1
4
4
5
6
7
4
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Description
Ground
Ground
RF I/O
Ground
Ground
Ground
Ground
Common
Ground
Ground
Ground
Ground
RF I/O
Ground
Ground
Control 2
Control 1
Control Voltage High
Control Voltage Low
70% V
DD
30% V
DD
V
V
I
DD
Power Supply Current
8
20
μA
Name
GND
GND
RF1
GND
GND
GND
GND
RFC
GND
GND
GND
GND
RF2
GND
GND
C2
C1
V
SS
/GND
GND
V
DD
GND
Table 4. Operating Ranges @ 25 °C
Parameter
V
DD
Power Supply
Min
2.7
Typ
3.0
Max
3.3
Unit
V
8
1
9
4
10
11
12
4
13
1
14
15
16
2
17
2
18
3
19
20
Pad
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE4280 in the 20-lead 4 x 4 x 0.85 mm QFN
package is MSL1.
Negative Supply Option
Ground
Supply
Ground Pad
Notes: 1. RF pins 3, 8, and 13 must be at 0 VDC. The RF pins do not require
DC blocking capacitors for proper operation if the 0 VDC requirement
is met.
2. Pins 16 and 17 are the CMOS controls that set the three operating
states.
3. Connect pin 18 to GND to enable the on-chip negative voltage
generator. Connect pin 18 to V
SS
(-3 V) to bypass and disable internal
-3 V supply generator. Also, see paragraph "Switching Frequency."
4. Customer can add external resistance to ground to change or modify
termination resistance.
©2010-11 Peregrine Semiconductor Corp. All rights reserved.
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UltraCMOS™ RFIC Solutions
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
PE4280
Product Specification
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Switching Frequency
The PE4280 has a maximum 25 kHz switching
rate when the internal negative voltage generator
is used (pin 18 = GND). The rate at which the
PE4280 can be switched is only limited to the
switching time if an external -3 V supply is
provided at pin 18 (V
SS
).
Table 5. RF Path Truth Table
C1
Low
Low
High
High
C2
Low
High
Low
High
RFC – RF1
OFF
OFF
ON
N/A
1
RFC – RF2
OFF
ON
OFF
N/A
1
Table 6. Termination Truth Table
C1
Low
Low
High
High
C2
Low
High
Low
High
N/A
1
N/A
1
RFC – 75
Ω
X
2
RF1 – 75
Ω
RF2 – 75
Ω
X
2
X
2
X
2
N/A
1
X
2
Notes: 1. The operation of the PE4280 is not supported or characterized in the
C1 = V
DD
and C2 = V
DD
state.
2. "X" denotes termination enabled.
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PE4280
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4280 SPDT switch. The RFC port is connected
through a 75
Ω
transmission line to J2. Port 1 and
Port 2 are connected through 75
Ω
transmission
lines to J1 and J3. A through transmission line
connects F connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a four metal layer
FR4 material with a total thickness of 0.062". The
transmission lines were designed using a
coplanar waveguide with ground plane (28 mil
core, 21 mil width, 30 mil gap).
J6 provides a means for controlling DC and digital
inputs to the device. The provided jumpers short
the package pin to ground for logic low. When the
jumper is removed, the pin is pulled up to V
DD
for
logic high.
When the jumper is in place, 3 µA of current will
flow through the 1 MΩ pull up resistor. This extra
current should not be attributed to the
requirements of the device.
Proper PCB design is essential for full isolation
performance. This eval board demonstrates good
trace and ground management for minimum
coupling and radiation.
Figure 4. Evaluation Board Layouts
Peregrine Specification 101/0148~03A
Figure 5. Evaluation Board Schematic
Peregrine Specification 102/0195~02A
J6
HEADER 7X2
VDD
GND
VSS/GND
GND
C1
GND
C2
1
3
5
7
9
11
13
C1
DNI
R1
1M
R2
1M
GND
GND
GND
GND
GND
GND
GND
2
4
6
8
10
12
14
20
19
18
17
16
VDD
GND
1
J1
1
VSS/GND
C2
DNI
GND
GND
15
14
13
12
11
C3
DNI
C1
GND
GND
RF1
GND
GND
75 OHM T-Line
C2
2
3
4
5
21
75 OHM T-Line
1
J3
U1
PE4280
RF2
GND
GND
2
GND
GND
GND
6
7
8
RFC
GND
9
J2
1
75 OHM T-Line
J4
10
GND
75 OHM T-Line
1
1
J5
2
2
©2010-11 Peregrine Semiconductor Corp. All rights reserved.
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2
2
PE4280
Product Specification
Typical Performance Data from -40 °C to +85 °C (unless otherwise noted)
(75
Ω
impedance except as indicated)
Figure 6. Insertion Loss (RFC to RF1 or RF2)
25C
-40C
85C
-0.2
-0.4
-0.6
Insertion Loss (dB)
Figure 7. Input to Output Isolation (Closed)
RFC - RF1 (RF2 CLOSED)
RFC - RF2 (RF1 CLOSED)
-40
-50
-60
Isolation (dB)
-0.8
-1
-1.2
-1.4
-70
-80
-90
-1.6
-1.8
0
500
1000
1500
Frequency (MHz)
-100
2000
2500
3000
0
500
1000
1500
Frequency (MHz)
2000
2500
3000
Figure 8. Input to Output Isolation (Open)
RFC - RF1 (RF2 OPEN)
RFC - RF2 (RF1 OPEN)
Figure 9.
Isolation - RF1 To RF2
RF1 - RF2 (RF1 Thru)
RF1 - RF2 (RF2 Thru)
RF1 - RF2 (RF1 & 2 OPEN)
-40
-40
-50
-50
-60
Isolation (dB)
Isolation (dB)
-60
-70
-70
-80
-80
-90
-90
-100
0
500
1000
1500
Frequency (MHz)
-100
2000
2500
3000
0
500
1000
1500
Frequency (MHz)
2000
2500
3000
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Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com