MX93L550A
1. FEATURES
The MX93L550A all-digital voice engine chip is designed for portable applications, such as
Digital Voice Recorder, Language Learning Machine, Electrical Book, PDA, Data Bank, Toys,
etc. It integrates high-performance 16-bit DSP and Codec (A/D and D/A) within single chip,
as well as many types of memory controllers. It is easily controlled by external host
controller through a simple host interface protocol and can provide various voice and
memory functions.
Provide excellent sound quality by adopting 12.8Kbps speech compression algorithms for
voice recording and playback. Further, a silence management algorithm is provided to
reduce silence between speech.
Multi rate speech algorithms including 1.2Kbps, 2.0Kbps, 3.6Kbps, 4.8Kbps, 6.0Kbps,
7.2Kbps, 8.4Kbps, 9.6Kbps, 5.2Kbps, 7.0Kbps, 8.8Kbps, 10.6Kbps, 12.4Kbps, 14.2Kbps,
and 12.8Kbps are available for voice playback only, which can offer flexible for
miscellaneous application.
Support Voice-Activated-Recording (VOX) mechanism for voice recording and enhanced
Playback-Speed-Adjustment (PSA) mechanism for voice playback.
Support memory management on Samsung 4Mb/8Mb/16Mb/32Mb/64Mb/128Mb/
NAND-type flash memory, Macronix 64Mb/128Mb/256Mb/512Mb sequential Mask-ROM
and 1Mb/4Mb/8Mb/16Mb/32Mb standard Mask-ROM/EPROM/OTP/MTP and Macronix
64Mb/128Mb/256Mb/512Mb NAND ROM. These memories could be the storage of
messages, voice prompt or user data.
Support various message operating functions, including rewind, fast forward, repeat, delete,
upload, download and move/copy between message folders.
Support powerful message editing functions, including speech insertion, removal and
appending.
Support voice prompt playback from interfaced flash memory or ROM.
Support recording/playback of speech compressed data to/from host controller directly
( Vocoder Mode).
Support recording/playback of speech raw data to/from host controller directly (Direct Codec
Access Mode).
Provide flash memory space (Data Bank blocks) to store user data.
Provide single-tone and dual-tone generator with adjustable output gains.
Support both serial and parallel microcontroller interface.
Built-in PLL (Phase Locked Loop) with 32.768KHz crystal as clock source.
Maximum 12 general-purpose input/output ports for I/O peripheral control.
Built-in one PCM Codec (14-bit A/D and D/A).
On-chip ALC (Automatic Level Control) and option of external ALC & another choice is
Software ALC without hardware solution.
Two auxiliary analog inputs for A/D and D/A paths.
On-chip programmable receive/transmit gain control for A/D and D/A paths.
Support on-chip digital volume control and external volume control.
Support external Low-Pass-Filter (LPF) for D/A output path.
Provide power down mode and shut down mode to save power consumption.
Operating voltage 2.7V
~
3.6V.
100 pins LQFP package.
Confidential Information
Dec.18, 2005 BY Felix_Ho
MX93L550A
2. FUNCTIONAL BLOCK DIAGRAM
VDD, GND
RST\, HOLD\,
SDOWN\,
Power
FILT, MIC, PGAC, ALCRC,
Codec
Control
FLL Clock
Generator
Interrupt
Controller
Serial/Parallel
Host
Interface
RAM
ROM
ALCC1, ALCC2, AUX1, SPK,
VR, AUX2, LPFC1, LPFC2,
VAG, VBG, AVDD, AGND
(ADC/DAC)
DSP
Core
General
Purpose
I/O
X32I, X32O
BIO[12:0], IPT[1:0],
OPT[1:0], PAEN\
EXTINT\
HRD\, HWR\, HCS\, HCLK,
HRACK\, HWACK\, HDB[7:0]
External
Memory
Controller
ED[15:0], EAD[20:0], EPCE\,
EDCE\, ERD\, EWR\, MCE1\,
MCE2\, MCE3\, MRE\, MWE\, CLE,
ALE, WP\, R/B\, ALEH, ALEL
SYSTEM BLOCK DIAGRAM
Key Pad
I/O Peripherals
BIO[12:0], IPT[1:0], OPT[1:0]
HRD\, HWR\,
Local
Memory
Host
Controller
HCS\, HCLK,
HRACK\,
HWACK\,
HDB[7:0]
Mic
MX93L550A
MIC, AUX1,
SPK, AUX2
Spk
EAD[20:0], ED[15:0], MCE1\, MCE2\, MCE3\, MRE\,
MWE\, CLE, ALE, WP\, R/B\, ALEH, ALEL
Display
Samsung
Flash Memory
Mask-ROM/
EPROM/OTP
Confidential Information
Dec.18, 2005 BY Felix_Ho
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