PACE1754/SOS
PROCESSOR INTERFACE CIRCUIT (PIC)
CMOS/SOS SPACE PROCESSOR
MICROPERIPHERAL
FEATURES
The PACE1754 (PIC) is a support chip for the
PACE1750A/AE Processors. It eliminates the
SSI/MSI Logic and external system functions
required in typical 1750A implementations.
Provides a significant savings in part-count and
power dissipation enhancing reliability and
overall system speed performance.
Provides an optimal interface when used with
the PACE1753 MMU/COMBO in a full 1750A
implementation.
Provides the following additional important
system functions:
— Programmable READY for memory and I/O
— Automatic READY during self-test and
internal I/O instructions
— 100KHz timer clock output provided
— Programmable system watchdog—ranges
from 1 µs to 1 minute
— Programmable Bus time-out function
— Memory Parity generation/detection
— Error detection of unimplemented memory
and/or I/O space addressing
— First failing memory address register for
diagnostics
— High drive three-state address latches
— Built-in system test program—automatically
tests the PACE1750A/AE CPUs, PACE1753
MMU/COMBO, PACE1754 PIC and system
address lines as well as memory and I/O
strobes
— System configuration decoding and buffering
— Interrupt acknowledge decoder and strobe
— Start up ROM support per MIL-STD-1750A
— Memory or I/O READ/WRITE three-state
strobes with external three-state control for
DMA applications
Available with Class S manufacturing,
screening, and testing.
SOS insulated substrate technology provides
absolute latch-up immunity and excellent SEU
tolerance.
SOS devices are fully interchangeable with
application-proven SMD CMOS P1754 devices.
20, 25 and 30 MHz operation over full Military
Temperature Range
Single 5V ± 10% Power Supply
Available in:
— 68-Lead Quad Pack with optional Gull Wing
Surface Mount
PACE1754 PROCESSOR INTERFACE
CIRCUIT DESCRIPTION
The PACE1754 Processor Interface Circuit (PIC) is a single
chip implementation of many special system functions that
are often required when using the PACE1750A/AE, a single
chip microprocessor. The PIC allows a system designer to
design a higher performance, more effecient microprocessor
system which uses less power and takes up less board
space.
The PIC provides many important system functions. These
functions are governed by respective bit positions in a
programmable Control Register which is incorporated in the
PIC. The individual bits of the control register are set to
select the various features and are set to a specified default
value upon Reset.
Document #
MICRO-9
REV B
Revised August 2005
PACE1754/SOS
DC ELECTRICAL SPECIFICATIONS
(Over recommended operating conditions)
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
V
OL
I
IH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage,
except A
0
– A
15
Output LOW Voltage,
A
0
– A
15
Input HIGH Current,
except IB
0
– IB
15
, parity/IB
16
,
SING ERR, A
0
/EXT AD
0
,
A
1
/EXT AD
1
, STRBA
Input HIGH Current,
IB
0
– IB
15
, parity/IB
16
,
A
0
/EXT AD
0
, A
1
/EXT AD
1
Input HIGH Current,
STRBA, SING ERR
Input LOW Current,
except IB
0
– IB
15
, parity/IB
16
,
SING ERR, A
0
/EXT AD
0
,
A
1
/EXT AD
1
,
STRBD, TEST ON
Input LOW Current,
IB
0
– IB
15
, parity/IB
16
, SING ERR,
A
0
/EXT AD
0
, A
1
/EXT AD
1
Input LOW Current,
STRBD, TEST ON
Output Three-State Current
Output Three-State Current
Quiescent Power
Supply Current
(CMOS Input Levels)
Quiescent Power
Supply Current
(TTL Input Levels)
Dynamic Power
I
CCD
I
OS
C
IN
C
OUT
Supply Current
f = 20MHz
f = 25MHz
f = 30MHz
Output Short Circuit Current
2
Input Capacitance
Output/Bi-directional
Capacitance
–25
10
15
2.4
V
CC
– 0.2
0.5
0.2
0.5
0.2
300
Min
2.0
–0.5
Max
V
CC
+ 0.5
0.8
–1.2
Unit
V
V
V
V
V
V
V
V
V
µA
V
CC
= 4.5V, I
IN
= –18mA
V
CC
= 4.5V,
V
IN
= 0.8V, 2.0V
V
CC
= 4.5V,
V
IN
= 0.8V, 2.0V
V
CC
= 4.5V,
V
IN
= 0.8V, 2.0V
V
IN
= V
CC
,
V
CC
= 5.5V
V
IN
= V
CC
,
V
CC
= 5.5V
V
IN
= V
CC
,
V
CC
= 5.5V
V
IN
= GND,
V
CC
= 5.5V
V
IN
= GND,
V
CC
= 5.5V
V
IN
= GND,
V
CC
= 5.5V
V
OUT
= 2.4V, V
CC
= 5.5V
V
OUT
= 0.5V, V
CC
= 5.5V
V
IN
< 0.2V or > V
CC
– 0.2V
f = 0MHz, Outputs Open,
V
CC
= 5.5V
V
IN
= 3.4V, f = 0MHz,
All Inputs, Outputs Open,
V
CC
= 5.5V
V
IN
= 0V to V
CC
,
tr = tf = 2.5 ns typ.,
Outputs Open, V
CC
= 5.5V
V
OUT
= GND, V
CC
= 5.5V
Inputs Only
Outputs Only
(Including I/O Buffers)
I
OH
= –8.0mA
I
OH
= –300µA
I
OL
= 8.0mA
I
OL
= 300µA
I
OL
= 20.0mA
I
OL
= 300µA
Conditions
1
I
IH
I
IH
I
IL
100
µA
300
–50
µA
µA
I
IL
I
IL
I
OZH
I
OZL
I
CCQC
–50
300
50
–50
25
µA
µA
µA
µA
mA
I
CCQT
100
90
100
125
mA
mA
mA
mA
mA
pF
pF
Notes:
1. 4.5V
≤
V
CC
≤
5.5V, –55°C
≤
T
C
≤
+125°C. Unless otherwise specified, testing shall be conducted at worst-case conditions.
2. Duration of the short should not exceed one second; only one output may be shorted at a time.
Document #
MICRO-9
REV B
Page 3 of 16
PACE1754/SOS
AC ELECTRICAL CHARACTERISTICS
1, 2
(V
CC
= 5V ± 10% Over Recommended Operating Conditions)
20 MHz
Symbol
tEX RDY (RDYD)
V
tC (RDYD)
V
tSTRBA
H
(A)
V
tIBA
V
(A)
V
tFC (R)
L
tSTRBD
H
(R)
H
tSTRBD
L
(W)
L
tSTRBD
H
(W)
H
tIBD
IN
(ME
PA ER)
L
tIBA
IN
(EX
AD ER)
tSTRBD
L
–
(STRT ROM)
V
tFC (IB OUT)
V
tC (TIMER CLK)
tIB IN
V
(IB16)
tEXT AD (CLKB3)
tEX
RDY1
(RDYD)
V
tSTRBD
H
(SCR
EN)
Parameter
Time from External Ready to
Ready Data Valid
Time from Clock Read to
Ready Data Valid
Time from Strobe Address HIGH to
Address Bus Valid
Time from Information Bus Address to
Address Bus Valid
Time from Falling Clock to
Read LOW
Time from Strobe Data HIGH to
Read HIGH
Time from Strobe Data LOW to
Write LOW
Time from Strobe Data HIGH to
Write HIGH
Time from Information Bus Data into
Memory Parity Error LOW
Time from Information Bus Address into
External Address Error
Time from Strobe Data LOW to
Start-up ROM Valid
Time from Falling Clock to
Information Bus Valid
Time from Rising Edge of Clock to
Timer Clock
Time from Information Bus Data to
Parity Valid
Extended Address
Setup Time
Time from External Ready Data to
Ready Data Valid
Time from STRBD HIGH to SCR Enable;
10
30
32
Min
Max
19
29
29
31
25
25
27
27
24
32
27
32
32
26
10
26
28
25MHz
Min
Max
15
25
25
27
21
21
23
23
20
28
23
28
28
23
10
24
26
30 MHz
Min
Max
14
23
23
25
19
19
21
21
18
26
21
26
26
21
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. 4.5V
≤
V
CC
≤
5.5V, –55°C
≤
T
C
≤
+125°C. Unless otherwise specified, testing shall be conducted at worst-case conditions.
2. All measurements of delay times on active signals are related to the 1.5V levels.
Document #
MICRO-9
REV B
Page 4 of 16
电源技术
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
