HCS193MS
September 1995
Radiation Hardened
Synchronous 4-Bit Up/Down Counter
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
P1
Q1
Q0
CPD
1
2
3
4
5
6
7
8
16 VCC
15 P0
14 MR
13 TCD
12 TCU
11 PL
10 P2
9 P3
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
CPU
Q2
Q3
GND
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.30% VCC Max
- VIH = 0.70% VCC Min
• Input Current Levels Ii
≤
5µA at VOL, VOH
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
P1
Q1
Q0
CPD
CPU
Q2
Q3
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
P0
MR
TCD
TCU
PL
P2
P3
Description
The Intersil HCS193MS is a Radiation Hardened 4-bit binary UP/
DOWN synchronous counter.
Presetting the counter to the number on the preset data inputs
(P0 - P3) is accomplished by a low on the asynchronous parallel
load input (PL). The counter is incremented on the low to high
transition of the clock-up input (high on the clock-down),
decremented on the low to high transition of the clock-down input
(high on the clock-up). A high level on the MR input overrides any
other input to clear the counter to zero. The Terminal Count Up
goes low half a clock period before the zero count is reached and
returns high at the maximum count.
The HCS193MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Ordering Information
PART NUMBER
HCS193DMSR
HCS193KMSR
HCS193D/Sample
HCS193K/Sample
HCS193HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
DB NA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
270
518759
3065.1
HCS193MS
Functional Diagram
P0
15
P1
1
P2
10
P3
9
14
MR
11
PL
5
CPU
PL R
P Q
FF0
CL Q
PL R
P Q
FF1
CL Q
PL R
P Q
FF2
CL Q
PL R
P Q
FF3
TCU
CL Q
13
TCD
12
4
CPD
8
GND
16
VCC
3
Q0
Q1
2
Q2
6
Q3
7
TRUTH TABLE
FUNCTION
Count Up
Count Down
Reset
Load Preset Inputs
H
X
X
X
X
= Transition from low to high
CLOCK UP
CLOCK DOWN
H
RESET
L
L
H
L
PARALLEL LOAD
H
H
X
L
H = High Level, L = Low Level, X = Immaterial,
Spec Number
271
518759
Specifications HCS193MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output.
. . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
θ
JA
θ
JC
o
C/W
SBDIP Package. . . . . . . . . . . . . . . . . . . .
73
24
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 114
o
C/W
29
o
C/W
o
C Ambient
Maximum Package Power Dissipation at +125
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . 100ns Max.
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
2, 3
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 4.5V, VIH = 3.15V,
IOL = 50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V
Output Voltage High
VOH
VCC = 4.5V, VIH = 3.15V,
IOL = -50µA, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = -50µA, VIL = 1.65V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
4.8
4.0
-4.8
-4.0
-
MAX
40
750
-
-
-
-
0.1
UNITS
µA
µA
mA
mA
mA
mA
V
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
VCC
-0.1
-
-
-
-
V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
V
1
2, 3
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
±0.5
±5.0
-
µA
µA
-
Noise Immunity
Functional Test
FN
VCC = 4.5V,
VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 2)
7, 8A, 8B
NOTES:
1. All voltages reference to device GND.
2. For functional tests VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
Spec Number
272
518759
Specifications HCS193MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
TPHL
VCC = 4.5V
9
10, 11
CPU TO TCU
TPLH,
TPHL
TPLH,
TPHL
TPLH
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
VCC = 4.5V
9
10, 11
TPHL
VCC = 4.5V
9
10, 11
PL to Qn
TPLH
VCC = 4.5V
9
10, 11
TPHL
VCC = 4.5V
9
10, 11
MR to Qn
TPHL,
TPLH
VCC = 4.5V
9
10, 11
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
MAX
31
38
31
36
23
27
23
27
32
39
31
37
26
31
34
40
33
38
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
CPU to Qn
SYMBOL
TPLH
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
CPD TO TCD
CPD to Qn
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
(NOTE 1)
CONDITIONS
VCC = 5.0V, f = 1MHz
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
Input Capacitance
CIN
VCC = 5.0V, f = 1MHz
+25
o
C
+125
o
C, -55
o
C
Output Transition Time
TTHL
TTLH
FMAX
VCC = 4.5V
+25
o
C
+125
o
C, -55
o
C
VCC = 4.5V
+25
o
C
+125
o
C, -55
o
C
TSU
VCC = 4.5V
+25
o
C
+125
o
C, -55
o
C
Hold Time Pn to PL
TH
VCC = 4.5V
+25
o
C
+125
o
C, -55
o
C
Hold Time CPD to CPU or CPU to
CPD
TH
VCC = 4.5V
+25
o
C
+125
o
C, -55
o
C
MIN
-
-
-
-
-
-
-
-
16
24
0
0
16
24
MAX
53
75
10
10
15
22
25
17
-
-
-
-
-
-
UNITS
pF
pF
pF
pF
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
PARAMETER
Capacitance Power Dissipation
SYMBOL
CPD
Maximum Operating Frequency
(CPU, CPD)
Setup Time Pn to PL
Spec Number
273
518759
Specifications HCS193MS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
(NOTE 1)
CONDITIONS
VCC = 4.5V
LIMITS
TEMPERATURE
+25
o
C
+125
o
C
Pulse Width PL
TW
VCC = 4.5V
+25
o
C
+125
o
C
Pulse Width MR
TW
VCC = 4.5V
+25
o
C
+125
o
C
Recovery Time PL to CPU, CPD
TREC
VCC = 4.5V
+25
o
C
+125
o
C
Recovery Time MR to CPU, CPD
TREC
VCC = 4.5V
+25
o
C
+125
o
C
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
4.0
-4.0
-
VCC
-0.1
-
-
2
2
2
2
2
2
2
2
2
MAX
0.75
-
-
0.1
-
±5
-
38
36
39
37
27
27
31
40
38
UNITS
mA
mA
mA
V
V
µA
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN
20
30
16
24
20
30
16
24
5
5
MAX
-
-
-
-
-
-
-
-
-
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETER
Pulse Width CPU to CPD
SYMBOL
TW
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Noise Immunity
Functional Test
CPU to Qn
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
FN
TPLH
TPHL
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50µA
VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50µA
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 3)
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
CPD to Qn
TPLH
TPHL
CPU TO TCU
CPD TO TCD
PL to Qn
TPHL,
TPLH
TPHL,
TPLH
TPLH
TPHL
MR to Qn
NOTES:
TPHL
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO
≥
4.0V is recognized as a logic “1”, and VO
≤
0.5V is recognized as a logic “0”.
Spec Number
274
518759
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