dsPIC33F Family
Data Sheet
High-Performance, 16-bit
Digital Signal Controllers
©
2006 Microchip Technology Inc.
Advance Information
DS70165B
Note the following details of the code protection feature on Microchip devices:
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
•
•
•
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip devices in life support and/or safety
applications is entirely at the buyer’s risk, and the buyer agrees
to defend, indemnify and hold harmless Microchip from any and
all damages, claims, suits, or expenses resulting from such
use. No licenses are conveyed, implicitly or otherwise, under
any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EE
L
OQ
, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Linear Active Thermistor,
MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,
PowerMate, PowerTool, Real ICE, rfLAB, rfPICDEM, Select
Mode, Smart Serial, SmartTel, Total Endurance, UNI/O,
WiperLock and Zena are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2006, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro
®
8-bit MCUs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS70165B-page ii
Advance Information
©
2006 Microchip Technology Inc.
dsPIC33F
High-Performance, 16-bit Digital Signal Controllers
Operating Range
• DC – 40 MIPS (40 MIPS @ 3.0-3.6V,
-40°C to +85°C)
• Industrial temperature range (-40°C to +85°C)
Digital I/O
•
•
•
•
•
Up to 85 programmable digital I/O pins
Wake-up/Interrupt-on-Change on up to 24 pins
Output pins can drive from 3.0V to 3.6V
All digital input pins are 5V tolerant
4 mA sink on all I/O pins
High-Performance DSC CPU
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Modified Harvard architecture
C compiler optimized instruction set
16-bit wide data path
24-bit wide instructions
Linear program memory addressing up to 4M
instruction words
Linear data memory addressing up to 64 Kbytes
84 base instructions: mostly 1 word/1 cycle
Sixteen 16-bit General Purpose Registers
Two 40-bit accumulators:
- With rounding and saturation options
Flexible and powerful addressing modes:
- Indirect, Modulo and Bit-Reversed
Software stack
16 x 16 fractional/integer multiply operations
32/16 and 16/16 divide operations
Single-cycle multiply and accumulate:
- Accumulator write back for DSP operations
- Dual data fetch
Up to ±16-bit shifts for up to 40-bit data
On-Chip Flash and SRAM
• Flash program memory, up to 256 Kbytes
• Data SRAM, up to 30 Kbytes (includes 2 Kbytes
of DMA RAM):
- Up to 33 Kbytes on devices marked “PS”
(includes 1 Kbyte of DMA RAM)
System Management
• Flexible clock options:
- External, crystal, resonator, internal RC
- Fully integrated PLL
- Extremely low jitter PLL
• Power-up Timer
• Oscillator Start-up Timer/Stabilizer
• Watchdog Timer with its own RC oscillator
• Fail-Safe Clock Monitor
• Reset by multiple sources
•
Power Management
• On-chip 2.5V voltage regulator
• Switch between clock sources in real time
• Idle, Sleep and Doze modes with fast wake-up
Direct Memory Access (DMA)
• 8-channel hardware DMA:
- 6-channel hardware DMA in devices marked “PS”
• 2 Kbytes dual ported DMA buffer area
(DMA RAM) to store data transferred via DMA:
- Allows data transfer between RAM and a
peripheral while CPU is executing code
(no cycle stealing)
- 1 Kbyte DMA RAM in devices marked “PS”
• Most peripherals support DMA
Timers/Capture/Compare/PWM
• Timer/Counters, up to nine 16-bit timers:
- Can pair up to make four 32-bit timers
- 1 timer runs as Real-Time Clock with external
32.768 kHz oscillator
- Programmable prescaler
• Input Capture (up to 8 channels):
- Capture on up, down or both edges
- 16-bit capture input functions
- 4-deep FIFO on each capture
• Output Compare (up to 8 channels):
- Single or Dual 16-Bit Compare mode
- 16-bit Glitchless PWM mode
Interrupt Controller
• 5-cycle latency
• 118 interrupt vectors
• Up to 67 available interrupt sources:
- Up to 63 available interrupt sources in
devices marked “PS”
• Up to 5 external interrupts
• 7 programmable priority levels
• 5 processor exceptions
©
2006 Microchip Technology Inc.
Advance Information
DS70165B-page 1
dsPIC33F
Communication Modules
• 3-wire SPI (up to 2 modules):
- Framing supports I/O interface to simple
codecs
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
sampling modes
2
C™ (up to 2 modules):
• I
- Full Multi-Master Slave mode support
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
• UART (up to 2 modules):
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
- IrDA
®
encoding and decoding in hardware
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
• Data Converter Interface (DCI) module:
- Codec interface
- Supports I
2
S and AC’97 protocols
- Up to 16-bit data words, up to 16 words per
frame
- 4-word deep TX and RX buffers
• Enhanced CAN (ECAN™ technology) 2.0B active
(up to 2 modules):
- Up to 8 transmit and up to 32 receive buffers
- 16 receive filters and 3 masks
- Loopback, Listen Only and Listen All
Messages modes for diagnostics and bus
monitoring
- Wake-up on CAN message
- Automatic processing of Remote
Transmission Requests
- FIFO mode using DMA
- Not present in devices marked “PS”
• CAN 2.0B active (up to 2 modules) in devices
marked “PS”:
- 3 transmit and 2 receive buffers
- 6 receive filters and 2 masks
- Loopback, Listen Only and Listen All
Messages modes for diagnostics and bus
monitoring
- Wake-up on CAN message
Motor Control Peripherals
• Motor Control PWM (up to 8 channels):
- 4 duty cycle generators
- Independent or Complementary mode
- Programmable dead time and output polarity
- Edge or center-aligned
- Manual output override control
- Up to 2 Fault inputs
- Trigger for ADC conversions
- PWM frequency for 16-bit resolution
(@ 40 MIPS) = 1220 Hz for Edge-Aligned
mode, 610 Hz for Center-Aligned mode
- PWM frequency for 11-bit resolution
(@ 40 MIPS) = 39.1 kHz for Edge-Aligned
mode, 19.55 kHz for Center-Aligned mode
• Quadrature Encoder Interface module:
- Phase A, Phase B and index pulse input
- 16-bit up/down position counter
- Count direction status
- Position Measurement (x2 and x4) mode
- Programmable digital noise filters on inputs
- Alternate 16-bit Timer/Counter mode
- Interrupt on position counter rollover/underflow
Analog-to-Digital Converters
• Up to two ADC modules in a device
• 10-bit, 2.2 Msps or 12-bit, 1 Msps conversion:
- 2, 4 or 8 simultaneous samples
- Up to 32 input channels with auto-scanning
- Conversion start can be manual or
synchronized with 1 of 4 trigger sources
- Conversion possible in Sleep mode
- ±1 LSB max integral nonlinearity
- ±1 LSB max differential nonlinearity
CMOS Flash Technology
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•
•
•
•
Low-power, high-speed Flash technology
Fully static design
3.3V (±10%) operating voltage
Industrial temperature
Low-power consumption
Packaging:
• 100-pin TQFP (14x14x1 mm and 12x12x1 mm):
- Only 14x14x1 mm for devices marked “PS”
• 80-pin TQFP (12x12x1 mm)
• 64-pin TQFP (10x10x1 mm)
Note:
See the device variant tables for exact
peripheral features per device.
DS70165B-page 2
Advance Information
©
2006 Microchip Technology Inc.
dsPIC33F
dsPIC33F PRODUCT FAMILIES
Note:
Prototype
samples are intended for
dsPIC33F early adopters and are based
on early revision silicon. Devices are
marked with a “PS” suffix. Major differ-
ences are noted in this data sheet. For
additional information, please contact your
Microchip salesperson.
The Motor Control Family supports a variety of motor
control applications, such as brushless DC motors,
single and 3-phase induction motors and switched
reluctance motors. These products are also well-suited
for Uninterrupted Power Supply (UPS), inverters,
Switched mode power supplies, power factor correc-
tion and also for controlling the power management
module in servers, telecommunication equipment and
other industrial equipment.
The device names, pin counts, memory sizes and
peripheral availability of each family are listed below,
followed by their pinout diagrams.
There are two device subfamilies within the dsPIC33F
family of devices. They are the General Purpose
Family and the Motor Control Family.
The General Purpose Family is ideal for a wide variety
of 16-bit MCU embedded applications. The variants
with codec interfaces are well-suited for speech and
audio processing applications.
dsPIC33F General Purpose Family Variants
Output Compare
Std. PWM
Program
Flash
Pins
Memory
(Kbyte)
64
64
100
64
80
100
64
64
100
64
80
100
64
100
100
64
64
64
64
64
64
128
128
128
128
128
128
256
256
256
I/O Pins (Max)
(2)
53
53
85
53
69
85
53
53
85
53
69
85
53
85
85
Input Capture
16-bit Timer
Enhanced
CAN
Codec
Interface
UART
I
2
C™
ADC
Device
RAM
(Kbyte)
(1)
SPI
Packages
dsPIC33FJ64GP206
dsPIC33FJ64GP306
dsPIC33FJ64GP310
dsPIC33FJ64GP706
dsPIC33FJ64GP708
dsPIC33FJ64GP710
dsPIC33FJ128GP206
dsPIC33FJ128GP306
dsPIC33FJ128GP310
dsPIC33FJ128GP706
dsPIC33FJ128GP708
dsPIC33FJ128GP710
dsPIC33FJ256GP506
dsPIC33FJ256GP510
dsPIC33FJ256GP710
Note 1:
2:
8
16
16
16
16
16
8
16
16
16
16
16
16
16
30
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 ADC, 18
ch
1 ADC, 18
ch
1 ADC, 32
ch
2 ADC, 18
ch
2 ADC, 24
ch
2 ADC, 32
ch
1 ADC, 18
ch
1 ADC, 18
ch
1 ADC, 32
ch
2 ADC, 18
ch
2 ADC, 24
ch
2 ADC, 32
ch
1 ADC, 18
ch
1 ADC, 32
ch
2 ADC, 32
ch
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
2
2
2
2
2
1
2
2
2
2
2
2
2
2
0
0
0
2
2
2
0
0
0
2
2
2
1
1
2
PT
PT
PF, PT
PT
PT
PF, PT
PT
PT
PF, PT
PT
PT
PF, PT
PT
PF, PT
PF, PT
RAM size is inclusive of 2 Kbytes DMA RAM.
Maximum I/O pin count includes pins shared by the peripheral functions.
©
2006 Microchip Technology Inc.
Advance Information
DS70165B-page 3
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