CALIFORNIA MICRO DEVICES
PACDN2404C
PACDN2408C
PACDN2416C
ESD Protection Arrays, Chip Scale Package
Features
• 4, 8, or 16 transient voltage suppressors in a
single package
• In-system Electrostatic Discharge (ESD)
protection to 18kV contact discharge per
IEC 61000-4-2 international standard
• Compact Chip Scale Package (0.65mm pitch) format
saves board space and eases layout in space
critical applications compared to discrete
solutions and traditional wire bonded packages
Applications
• ESD protection of I/O port connections,
such as cellular phone, PDA, internet appliance
and PC ports
• Protection of interface ports or IC pins which are
exposed to high levels of ESD
• ESD protection of analog video and audio R, L, V
(right, left, video) ports
Product Description
The PACDN2404C, PACDN2408C and PACDN2416C
are transient voltage suppressor arrays that provide a
very high level of protection for sensitive electronic
components that may be subjected to ESD. The back-to-
back zener connections provide ESD protection in cases
where nodes with AC signals are present.
These devices are designed and characterized to safely
dissipate ESD strikes at levels well beyond the maxi-
mum requirements set forth in the IEC 61000-4-2
international standard (Level 4, 8kV contact discharge).
All I/Os are rated at 18kV using the IEC 61000-4-2
contact discharge method. Using the MIL-STD-883D
(Method 3015) specification for Human Body Model
(HBM) ESD, all pins are protected for contact discharges
to greater than 30kV.
The Chip Scale Package format of these devices enable
extremely small footprints that are necessary in portable
electronics such as cellular phones, PDAs, internet
appliances and PCs. The large solder bumps allow for
standard attachment to laminate boards without the use
of underfill.
SCHEMATIC DIAGRAMS
D1
D2
D3
D4
D5
B1
B2
B3
B1
B2
B3
B4
B5
C1
B1
A1
A2
A3
A1
A2
A3
A4
A5
C2
B2
C3
B3
C4
B4
C5
B5
PACDN2404C
PACDN2408C
A1
A2
A3
A4
A5
PACDN2416C
S TA N D A R D PA R T O R D E R I N G I N F O R M AT I O N
Package
Style
Chip Scale
Chip Scale
Chip Scale
© 2000 California Micro Devices Corp. All rights reserved.
7/17/2000
Ordering Part Number
Bumps
6
10
20
Tape & Reel
PACDN2404C/R
PACDN2408C/R
PACDN2416C/R
C1230700
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
CALIFORNIA MICRO DEVICES
PACDN2404C
PACDN2408C
PACDN2416C
S P E C I F I C AT I O N S
(At 25°C unless specified otherwise)
Min
Reverse Stand-off Voltage, I = 10µA
Signal Clamp Voltage:
Positive Clamp, 10mA
Negative Clamp, 10mA
In-system ESD withstand voltage*:
Human Body Model (MIL-STD-883D, method 3015)
IEC 61000-4-2, contact discharge method
Clamping voltage during ESD discharge
MIL-STD-883D (Method 3015), 8kV
Capacitance at 2.5V dc, 1MHz
Temperature Range:
Operating
Storage
Positive
Negative
±5.9
6.0
–9.2
7.6
–7.6
±30
±18
14
–14
39
–40
–65
85
150
9.2
–6.0
Typ
Max
Unit
V
V
V
kV
kV
V
V
pF
°C
* ESD applied between channel pin and ground, one at a time. All other channels are open. This
parameter is guaranteed by design and characterization
P R I N T E D C I R C U I T B OA R D R E C O M M E N D AT I O N S
Pad Size on PCB
Pad Shape
Pad Definition
Solder Mask Opening
Solder Stencil Thickness
Solder Stencil Aperture Opening
Solder Flux Ratio
Solder Paste
Bond Trace Finish
0.300mm
Round
Non Solder Mask Defined Pads (NSMD)
0.350mm
0.152mm
0.360mm (sq.)
50/50
No Clean
OSP (Entek Cu Plus 106A)
250
EXH
225
200
Temperature (
o
C)
PH
Z2
Z3
Z4
Z5
RF
CD
EXH
175
150
125
100
75
50
25
0
48
97
145
194
Time (s)
242
290
339
387
435
Typical Solder Reflow Thermal Profile (No Clean Flux)
©2000 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
7/17/2000
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