REVISIONS
LTR
DESCRIPTION
DATE
(YR-MO-DA)
APPROVED
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
15
16
17
18
REV
SHEET
PREPARED BY
Kenneth Rice
CHECKED BY
Jeff Bowling
1
2
3
4
5
6
7
8
9
10
11
12
13
14
19
20
21
22
23
24
25
26
26
28
29
30
31
32
33
34
35
36
37
38
39
PMIC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
APPROVED BY
Raymond Monnin
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 28000 GATE
PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
DRAWING APPROVAL DATE
98-11-06
REVISION LEVEL
SIZE
CAGE CODE
A
SHEET
67268
1
OF
39
5962-98509
AMSC N/A
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E403-98
1. SCOPE
1.1 Scope. This drawing documents three product assurance class levels consisting of space application (device class V), high
reliability (device classes M and Q), and nontraditional performance environment (device class N). A choice of case outlines and
lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation
Hardness Assurance (RHA) levels are reflected in the PIN. For device class N, the user is cautioned to assure that the device is
appropriate for the application environment.
1.2 PIN. The PIN shall be as shown in the following example:
5962
*
*
*
-
*
*
*
98509
01
*
*
*
Q
*
*
*
X
*
*
*
X
*
*
*
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
01
Generic number
XQ4028EX-4
Circuit function
28,000 gate programmable array
Access time
4.0 ns
1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as
follows:
Device class
M
N
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN
class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535 with a non-traditional
performance environment encapsulated in plastic
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835, JEDEC Publication 95, and as follows:
Outline letter
X
Y
Z
U
T
Descriptive designator
Terminals
299
228
228
352
240
Package style
Pin grid array package
Quad flat package
Quad flat package
Ball grid array with four rows on each side (plastic)
Quad flat package
with heat sink molded in the package (plastic)
CMGA12-P299
See figure 1
See figure 1
LBGA-B-352
(JEDEC MO-192-BAR-2 )
PQFP-G-240
(JEDEC MS-029-GA )
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, appendix
A for device class M.
SIZE
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 42316-5000
DSCC FORM 2234
APR 97
A
REVISION LEVEL
5962-98509
SHEET
2
1.3 Absolute maximum ratings. 1/ 2/
Supply voltage range to ground potential (VCC) - - - - - -
DC input voltage range ( VIN ) - - - - - - - - - - - - - - - - - - -
Voltage applied to three-state output(VTS) - - - - - - - - - -
Lead temperature (soldering, 10 seconds) - - - - - - - - - -
Power dissipation (PD ) - - - - - - - - - - - - - - - - - - - - - - - -
Thermal resistance, junction-to-case (
1
JC):
Case outline X - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Case outlines Y, Z - - - - - - - - - - - - - - - - - - - - - - - - - - -
Case outlines U - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Case outlines T - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Junction temperature (TJ) Ceramic packages - - - - - - - -
Junction temperature (TJ) Plastic packages - - - - - - - - - -
Storage temperature range - - - - - - - - - - - - - - - - - - - - -
1.4 Recommended operating conditions.
Supply voltage relative to ground(VCC) - - - - - - - - - - - - -
Input high voltage ( VIH ) - - - - - - - - - - - - - - - - - - - - - - -
Input low voltage (VIL) - - - - - - - - - - - - - - - - - - - - - - - - -
Maximum input signal transition time (tIN) - - - - - - - - - - -
Case operating temperature range (TC) - - - - - - - - - - - -
Junction operating temperature range (TJ) - - - - - - - - - -
1.5 Digital logic testing for device classes N, Q and V.
-0.5 V dc to +7.0 V dc
-0.5 V to VCC + 0.5 V
-0.5 V to VCC + 0.5 V
+260
E
C
2.0 W
See MIL-STD-1835
20
E
C/W 3/
0.8
E
C/W 3/
1.5
E
C/W 3/
+150
E
C 4/
+125
E
C 4/
-65
E
C to +150
E
C
+4.5 V dc minimum to +5.5 V dc maximum
2.0 V dc to VCC
0 V dc to 0.8 V dc
250 ns
-55
E
C to +125
E
C
-55
E
C to +125
E
C for Plastic packages
Fault coverage measurement of manufacturing
logic tests (MIL-STD-883, test method 5012) - - - - - - - - - - - - - - - - - - - - - - - - 99.9 percent
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of
this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue
of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-973 - Configuration Management.
MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMD's).
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
1/
2/
3/
4/
All voltage values in this drawing are with respect to VSS
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
When a thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein.
Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
SIZE
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 42316-5000
DSCC FORM 2234
APR 97
A
REVISION LEVEL
5962-98509
SHEET
3
2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless
otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS cited in the
solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in
the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192-88
-
Standard Guide for the Measurement of Single Event Phenomena from
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials, 1916 Race
Street, Philadelphia, PA 19103.)
ELECTRONICS INDUSTRIES ALLIANCE (EIA)
JEDEC Standard No. 17
-
A Standardized Test Procedure for the Characterization of
Latch-up in CMOS Integrated Circuits.
Registered and Standard Outlines for Semiconductor Devices
JEDEC Publication 95
-
(Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Blvd., Arlington, VA 22201.
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute the
documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes N, Q, and V shall be in accordance with MIL-PRF-
38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the
QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in
accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes N, Q, and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Logic block diagram. The logic block diagram shall be as specified on figure 3.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical
performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating
temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests
for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked
as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the
manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator
shall still be marked. Marking for device classes N, Q, and V shall be in accordance with MIL-PRF-38535. Marking for device
class M shall be in accordance with MIL-PRF-38535, appendix A.
SIZE
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 42316-5000
DSCC FORM 2234
APR 97
A
REVISION LEVEL
5962-98509
SHEET
4
3.5.1 Certification/compliance mark. The certification mark for device classes N, Q, and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes N, Q, and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing
shall affirm that the manufacturer's product meets, for device classes N, Q, and V, the requirements of MIL-PRF-38535 and herein
or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes N, Q, and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to
this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein)
involving devices acquired to this drawing is required for any change as defined in MIL-STD-973.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available
onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit
group number 42 (see MIL-PRF-38535, appendix A).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes N, Q, and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall
not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes N, Q, and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance
with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
b.
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and shall
be made available to the preparing or acquiring activity upon request. For device class M, the test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015.
Interim and final electrical parameters shall be as specified in table IIA herein.
c.
4.2.2 Additional criteria for device classes N, Q, and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained
under document revision level control of the device manufacturer's Technology Review Board (TRB) in
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request.
The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with
the intent specified in test method 1015 of MIL-STD-883.
Interim and final electrical test parameters shall be as specified in table IIA herein.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of
MIL-PRF-38535.
b.
c.
SIZE
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 42316-5000
DSCC FORM 2234
APR 97
A
REVISION LEVEL
5962-98509
SHEET
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
