GM71V17803C
GM71VS17803CL
2,097,152 WORDS x 8 BIT
CMOS DYNAMIC RAM
Description
The GM71V(S)17803C/CL is the new
generation dynamic RAM organized 2,097,152
x 8 bit. GM71V(S)17803C/CL has realized
higher density, higher performance and various
functions by utilizing advanced CMOS process
technology. The GM71V(S)17803C/CL offers
Extended Data out(EDO) Page Mode as a high
speed access mode. Multiplexed address inputs
permit the GM71V(S)17803C/CL to be
packaged in standard 400 mil 28pin plastic SOJ,
and standard 400mil 28pin plastic TSOP II. The
package size provides high system bit densities
and is compatible with widely available
automated testing and insertion equipment.
Features
* 2,097,152 Words x 8 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (3.3V+/-0.3V)
* Fast Access Time & Cycle Time
(Unit: ns)
t
RAC
t
CAC
GM71V(S)17803C/CL-5
GM71V(S)17803C/CL-6
GM71V(S)17803C/CL-7
50
60
70
13
15
18
t
RC
84
104
124
t
HPC
20
25
30
Pin Configuration
28 SOJ
V
CC 1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
WE
6
RAS
7
NC
8
A10
9
28
V
SS
27
I/O7
26
I/O6
25
I/O5
24
I/O4
23
CAS
22
OE
21
A9
20
A8
19
A7
18
A6
17
A5
16
A4
15
V
SS
* Low Power
Active : 396/360/324mW (MAX)
Standby : 7.2mW (CMOS level : MAX)
0.36mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
*All inputs and outputs TTL Compatible
* 2048 Refresh Cycles/32ms
* 2048 Refresh Cycles/128ms (L-version)
* Self Refresh Operation (L-version)
* Battery Back Up Operation (L-version)
28 TSOP II
V
CC 1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
WE
6
RAS
7
NC
8
V
SS
I/O7
I/O6
I/O5
I/O4
CAS
28
27
26
25
24
23
V
SS
I/O7
I/O6
I/O5
I/O4
CAS
22
OE
21
A9
20
A8
19
A7
18
A6
17
A5
16
A4
A10
9
A0
10
A1
11
A2
12
A3
13
V
CC 14
V
SS
A0
10
A1
11
A2
12
A3
13
V
CC 14
15
V
SS
(Top View)
Rev 0.1 / Apr’01
GM71V17803C
GM71VS17803CL
Pin Description
Pin
A0-A10
A0-A10
I/O0-I/O7
RAS
CAS
Function
Address Inputs
Refresh Address Inputs
Data Input/ Data Output
Row Address Strobe
Column Address Strobe
Pin
WE
OE
V
CC
V
SS
NC
Function
Read/Write Enable
Output Enable
Power (+3.3V)
Ground
No Connection
Ordering Information
Type No.
GM71V(S)17803CJ/CLJ -5
GM71V(S)17803CJ/CLJ -6
GM71V(S)17803CJ/CLJ -7
GM71V(S)17803CT/CLT -5
GM71V(S)17803CT/CLT -6
GM71V(S)17803CT/CLT -7
Access Time
50ns
60ns
70ns
50ns
60ns
70ns
Package
400 Mil
28 Pin
Plastic SOJ
400 Mil
28 Pin
Plastic TSOP II
Absolute Maximum Ratings*
Symbol
T
A
T
STG
V
IN/OUT
V
CC
I
OUT
P
D
Parameter
Ambient Temperature under Bias
Storage Temperature
Voltage on any Pin Relative to V
SS
Supply Voltage Relative to V
SS
Short Circuit Output Current
Power Dissipation
Rating
0 ~ 70
-55 ~ 125
-0.5 ~ Vcc+0.5
(<=4.6V(MAX))
-0.5 ~ 4.6
50
1.0
Unit
C
C
V
V
mA
W
Note: Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
Recommended DC Operating Conditions
(T
A
= 0 ~ 70C)
Symbol
V
CC
V
IH
V
IL
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Min
3.0
2.0
-0.3
Typ
3.3
-
-
Max
3.6
V
CC
+ 0.3
0.8
Unit
V
V
V
Note: All voltage referred to Vss.
Rev 0.1 / Apr’01
GM71V17803C
GM71VS17803CL
DC Electrical Characteristics
(V
CC
= 3.3V+/-0.3V, Vss = 0V, T
A
= 0 ~ 70C)
Symbol
V
OH
V
OL
I
CC1
Parameter
Output Level
Output "H" Level Voltage (I
OUT
= -2mA
)
Output Level
Output "L" Level Voltage (I
OUT
=
2
mA)
Operating Current
Average Power Supply Operating Current
(RAS, CAS Cycling
:
t
RC
=
t
RC
min)
Standby Current (TTL)
Power Supply Standby Current
(RAS, CAS = V
IH
,
D
OUT
=
High-Z)
RAS Only Refresh Current
Average Power Supply Current
RAS Only Refresh Mode
(t
RC
= t
RC
min)
EDO Page Mode Current
Average Power Supply Current
EDO Page Mode
(t
HPC
= t
HPC
min)
Standby Current (CMOS)
Power Supply Standby Current
(RAS, CAS
>
V
CC
- 0.2V, D
OUT
= High-Z)
CAS-before-RAS Refresh Current
(t
RC
= t
RC
min)
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
Min
2.4
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
V
CC
0.4
110
100
90
2
110
100
90
100
90
85
1
150
110
100
90
400
Unit
V
V
Note
mA
1, 2
I
CC2
mA
I
CC3
mA
2
I
CC4
mA
1, 3
I
CC5
mA
uA
5
I
CC6
mA
I
CC7
Battery Back Up Operating Current(Standby with CBR Ref.)
(CBR refresh, t
RC
= 62.5us
,
t
RAS
<=
0.3
us,
D
OUT
=
High-Z, CMOS Interface)
Standby Current RAS = V
IH
CAS = V
IL
D
OUT
=
Enable
Self-Refresh Mode Current
(RAS, CAS<= 0.2V
,
D
OUT
=
High-Z, CMOS interface)
Input Leakage Current
Any Input (0V
<=
V
IN
<=
4.6V)
Output Leakage Current
(D
OUT
is Disabled, 0V
<=
V
OUT
<= 4.
6V)
uA
4,5
I
CC8
I
CC9
I
L(I)
I
L(O)
-
-
-10
-10
5
250
10
10
mA
uA
uA
uA
1
5
Note: 1. I
CC
depends on output load condition when the device is selected.
I
CC
(max) is specified at the output open condition.
2. Address can be changed once or less while RAS = V
IL
.
3. Address can be changed once or less while CAS = V
IH
.
4. CAS = L (
<=
0.2V) while RAS = L (
<=
0.2V).
5. L -version.
Rev 0.1 / Apr’01
GM71V17803C
GM71VS17803CL
Capacitance
(V
CC
= 3.3V+/-0.3V, T
A
= 25C)
Symbol
C
I1
C
I2
C
I/O
Parameter
Input Capacitance (Address)
Input Capacitance (Clocks)
Output Capacitance (Data-In/Out)
Min
-
-
-
Max
5
7
7
Unit
pF
pF
pF
Note
1
1
1, 2
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = V
IH
to disable D
OUT
.
AC Characteristics
(V
CC
= 3.3V+/-0.3V, T
A
= 0 ~
+
70C, Note 1, 2, 18)
Test Conditions
Input rise and fall times : 2 ns
Input levels : VIL = 0V, VIH = 3V
Input timing reference levels : 0.8V, 2.0V
Output timing reference levels : 0.8V, 2.0V
Output load : 1TTL gate + C
L
(100 pF)
(Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles
(Common Parameters)
Symbol
Parameter
Random Read or Write Cycle Time
RAS Precharge Time
CAS Precharge Time
RAS Pulse Width
CAS Pulse Width
Row Address Set up Time
Row Address Hold Time
Column Address Set-up Time
Column Address Hold Time
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS Hold Time
CAS Hold Time
CAS to RAS Precharge Time
OE to D
IN
Delay Time
OE Delay Time from D
IN
CAS Delay Time from D
IN
Transition Time (Rise and Fall)
GM71V(S)17803 GM71V(S)17803 GM71V(S)17803
C/CL-6
C/CL-7
C/CL-5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
Min Max Min Max Min Max
t
RC
t
RP
t
CP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
ODD
t
DZO
t
DZC
t
T
84
30
8
-
-
-
104
40
10
-
-
-
124
50
13
-
-
-
50
10,000
8
10,000
0
8
0
8
12
10
10
35
5
13
0
0
2
-
-
-
-
37
25
-
-
-
-
-
-
50
60
10,000
10
10,000
0
10
0
10
14
12
13
40
5
15
0
0
2
-
-
-
-
45
30
-
-
-
-
-
-
50
70
10,000
13
10,000
0
10
0
13
14
12
13
45
5
18
0
0
2
-
-
-
-
52
35
-
-
-
-
-
-
50
3
4
5
6
6
7
Rev 0.1 / Apr’01
GM71V17803C
GM71VS17803CL
Read Cycle
Symbol
Parameter
Access Time from RAS
Access Time from CAS
Access Time from Address
Access Time from OE
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
CAS to Output in Low-Z
Output Data Hold Time
Output Data Hold Time from OE
Output Buffer Turn-off Time
Output Buffer Turn-off Time to OE
CAS to D
IN
Delay Time
Read Command Hold Time from RAS
Output Data hold Time from RAS
Output Buffer turn off to RAS
Output Buffer turn off to WE
WE to D
IN
Delay Time
RAS to D
IN
Delay Time
GM71V(S)17803 GM71V(S)17803 GM71V(S)17803
C/CL-5
C/CL-6
C/CL-7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
8,9
9,10,17
9,11,17
9
Min Max
Min Max Min Max
-
-
-
-
0
0
5
30
18
0
3
3
-
-
15
60
3
-
-
15
15
60
15
30
15
-
-
-
-
-
-
-
-
15
15
-
-
-
15
15
-
-
-
-
-
-
0
0
5
35
23
0
3
3
-
-
18
70
3
-
-
18
18
70
18
35
18
-
-
-
-
-
-
-
-
15
15
-
-
-
15
15
-
-
t
RAC
t
CAC
t
AA
t
OAC
t
RCS
t
RCH
t
RRH
t
RAL
t
CAL
t
CLZ
t
OH
t
OHO
t
OFF
t
OEZ
t
CDD
t
RCHR
t
OHR
t
OFR
t
WEZ
t
WDD
t
RDD
-
-
-
-
0
0
5
25
15
0
3
3
-
-
13
50
3
-
-
13
13
50
13
25
13
-
-
-
-
-
-
-
-
13
13
-
-
-
13
13
-
-
12
12
13
13
5
Rev 0.1 / Apr’01
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