EN29LV640T/B
EN29LV640T/B
64 Megabit (8M x 8-bit / 4M x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
FEATURES
•
Single power supply operation
- Full voltage range: 2.7 to 3.6 volts read and
write operations
•
High performance
- Access times as fast as 70 ns
•
Low power consumption (typical values at 5
MHz)
- 9 mA typical active read current
- 20 mA typical program/erase current
- Less than 1
μA
current in standby or automatic
sleep mode.
•
Standard DATA# polling and toggle bits
feature
•
Unlock Bypass Program command supported
•
Erase Suspend / Resume modes:
Read and program another Sector during
Erase Suspend Mode
•
Support JEDEC Common Flash Interface
(CFI).
•
Low Vcc write inhibit < 2.5V
•
Minimum 100K program/erase endurance
cycles.
•
RESET# hardware reset pin
- Hardware method to reset the device to read
mode.
•
WP#/ACC input pin
- Write Protect (WP#) function allows
protection of outermost two boot sectors,
regardless of sector protect status
- Acceleration (ACC) function provides
accelerated program times
•
Package Options
- 48-pin TSOP (Type 1)
- 48 ball 6mm x 8mm FBGA
•
Commercial and Industrial Temperature
Range.
•
Flexible Sector Architecture:
- Eight 8-Kbyte sectors, One hundred and
twenty-seven 32K-Word / 64K-byte sectors.
- 8-Kbyte sectors for Top or Bottom boot.
- Sector/Sector Group protection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
Additionally, temporary Sector Group
Unprotect allows code changes in previously
locked sectors.
•
-
-
-
High performance program/erase speed
Word program time: 8µs typical
Sector erase time: 500ms typical
Chip erase time: 64s typical
•
JEDEC Standard compatible
GENERAL DESCRIPTION
The EN29LV640T/B is a 64-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 8,388,608 bytes or 4,194,304 words. Any word can be programmed typically in 8µs. The
EN29LV640T/B features 3.0V voltage read and write operation, with access times as fast as 70ns to
eliminate the need for WAIT states in high-performance microprocessor systems.
The EN29LV640T/B has separate Output Enable (OE#), Chip Enable (CE#), and Write Enable (WE#)
controls, which eliminate bus contention issues. This device is designed to allow either single Sector
or full Chip erase operation, where each Sector can be individually protected against program/erase
operations or temporarily unprotected to erase or program. The device can sustain a minimum of 100K
program/erase cycles on each Sector.
.
This Data Sheet may be revised by subsequent versions
1
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2007/05/16
EN29LV640T/B
CONNECTION DIAGRAMS
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2007/05/16
EN29LV640T/B
TABLE 1. PIN DESCRIPTION
LOGIC DIAGRAM
Pin Name
A0-A21
DQ0-DQ14
DQ15 / A-1
CE#
OE#
WE#
WP#/ACC
RESET#
BYTE#
RY/BY#
Vcc
Vss
NC
Function
22 Address inputs
15 Data Inputs/Outputs
DQ15 (data input/output, in word mode),
A-1 (LSB address input, in byte mode)
Chip Enable
Output Enable
Write Enable
Write Protect / Acceleration Pin
Hardware Reset Pin
Byte/Word mode selection
Ready/Busy Output
Supply Voltage
(2.7-3.6V)
Ground
Not Connected to anything
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
3
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2007/05/16
EN29LV640T/B
ORDERING INFORMATION
T
―
EN29LV640
70
T
C
P
PACKAGING CONTENT
(Blank) = Conventional
P = Pb Free
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
I = Industrial (-40°C to +85°C)
PACKAGE
T = 48-pin TSOP
B = 48-Ball Fine Pitch Ball Grid Array (FBGA)
0.80mm pitch, 6mm x 8mm package
SPEED
70 = 70ns
90 = 90ns
BOOT CODE SECTOR ARCHITECTURE
T = Top boot Sector
B = Bottom boot Sector
BASE PART NUMBER
EN = EON Silicon Solution Inc.
29LV = FLASH, 3V Read, Program and Erase
640 = 64 Megabit (8M x 8 / 4M x 16)
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
4
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2007/05/16
EN29LV640T/B
U
Table 2A. Top Boot Sector Address Tables (EN29LV640T)
A21 – A12
0000000xxx
0000001xxx
0000010xxx
0000011xxx
0000100xxx
0000101xxx
0000110xxx
0000111xxx
0001000xxx
0001001xxx
0001010xxx
0001011xxx
0001100xxx
0001101xxx
0001110xxx
0001111xxx
0010000xxx
0010001xxx
0010010xxx
0010011xxx
0010100xxx
0010101xxx
0010110xxx
0010111xxx
0011000xxx
0011001xxx
0011010xxx
0011011xxx
0011100xxx
0011101xxx
0011110xxx
0011111xxx
0100000xxx
0100001xxx
0100010xxx
0100011xxx
0100100xxx
0100101xxx
Sector Size
(Kbytes / Kwords)
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
Address Range (h)
Byte mode (x8)
000000–00FFFF
010000–01FFFF
020000–02FFFF
030000–03FFFF
040000–04FFFF
050000–05FFFF
060000–06FFFF
070000–07FFFF
080000–08FFFF
090000–09FFFF
0A0000–0AFFFF
0B0000–0BFFFF
0C0000–0CFFFF
0D0000–0DFFFF
0E0000–0EFFFF
0F0000–0FFFFF
100000–10FFFF
110000–11FFFF
120000–12FFFF
130000–13FFFF
140000–14FFFF
150000–15FFFF
160000–16FFFF
170000–17FFFF
180000–18FFFF
190000–19FFFF
1A0000–1AFFFF
1B0000–1BFFFF
1C0000–1CFFFF
1D0000–1DFFFF
1E0000–1EFFFF
1F0000–1FFFFF
200000–20FFFF
210000–21FFFF
220000–22FFFF
230000–23FFFF
240000–24FFFF
250000–25FFFF
Address Range (h)
Word Mode (x16)
000000–007FFF
008000–00FFFF
010000–017FFF
018000–01FFFF
020000–027FFF
028000–02FFFF
030000–037FFF
038000–03FFFF
040000–047FFF
048000–04FFFF
050000–057FFF
058000–05FFFF
060000–067FFF
068000–06FFFF
070000–077FFF
078000–07FFFF
080000–087FFF
088000–08FFFF
090000–097FFF
098000–09FFFF
0A0000–0A7FFF
0A8000–0AFFFF
0B0000–0B7FFF
0B8000–0BFFFF
0C0000–0C7FFF
0C8000–0CFFFF
0D0000–0D7FFF
0D8000–0DFFFF
0E0000–0E7FFF
0E8000–0EFFFF
0F0000–0F7FFF
0F8000–0FFFFF
100000–107FFF
108000–10FFFF
110000–117FFF
118000–11FFFF
120000–127FFF
128000–12FFFF
Sector
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
SA32
SA33
SA34
SA35
SA36
SA37
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2007/05/16
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