3 Volt Advanced+ Boot Block Flash
Memory
28F800C3, 28F160C3, 28F320C3, 28F640C3 (x16)
Preliminary Datasheet
Product Features
s
s
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Flexible SmartVoltage Technology
— 2.7 V–3.6 V Read/Program/Erase
— 12 V for Fast Production Programming
High Performance
— 2.7 V–3.6 V: 70 ns Max Access Time
Optimized Architecture for Code Plus Data
Storage
— Eight 4-Kword Blocks, Top or Bottom
Locations
— Up to One Hundred-Twenty-Seven 32-
Kword Blocks
— Fast Program Suspend Capability
— Fast Erase Suspend Capability
Flexible Block Locking
— Lock/Unlock Any Block
— Full Protection on Power-Up
— WP# Pin for Hardware Block Protection
— V
PP
= GND Option
— V
CC
Lockout Voltage
Low Power Consumption
— 9 mA Typical Read Power
— 7 µA Typical Standby Power with
Automatic Power Savings Feature
12 V Fast Production Program
Extended Temperature Operation
— –40 °C to +85 °C
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128-bit Protection Register
— 64-bit Unique Device Identifier
— 64-bit User Programmable OTP Cells
Extended Cycling Capability
— Minimum 100,000 Block Erase Cycles
Supports Intel
®
Flash Data Integrator
Software
— Flash Memory Manager
— System Interrupt Manager
— Supports Parameter Storage, Streaming
Data (e.g., voice)
Automated Word/Byte Program and Block
Erase
— Command User Interface
— Status Registers
Cross-Compatible Command Support
— Intel Basic Command Set
— Common Flash Interface
Standard Surface Mount Packaging
— 48-Ball CSP Packages
— 64-Ball Easy BGA Packages
— 48-Lead TSOP Package
ETOX™ VII (0.18
µ)
Flash Technology
— 28F160/320/640C3xC
— 8-, 16- and 32-Mbit also exist on
ETOX™ VI (0.25
µ)
Flash Technology
The 3 Volt Advanced+ Boot Block Flash memory, manufactured on Intel’s latest 0.18 µ
technology, represents a feature-rich solution for low power applications. 3 Volt Advanced+
Boot Block Flash memory devices incorporate low voltage capability (2.7 V read, program and
erase) with high-speed, low-power operation. Flexible block locking allows any block to be
independently locked or unlocked. Add to this the Intel
®
Flash Data Integrator (IFDI) software
and you have a cost-effective, flexible, monolithic code plus data storage solution. Intel
®
3 Volt
Advanced+ Boot Block products will be available in 48-lead TSOP, 48-ball CSP, and 64-ball
Easy BGA packages. Additional information on this product family can be obtained by
accessing the Intel
®
Flash website: http://www.intel.com/design/flash.
Notice:
This document contains preliminary information on new products in production. The
specifications are subject to change without notice. Verify with your local Intel sales office that
you have the latest datasheet before finalizing a design.
Order Number: 290645-010
October 2000
Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any
intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no
liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are
not intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 28F800C3, 28F160C3, 28F320C3, 28F640C3 may contain design defects or errors known as errata which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright © Intel Corporation, 1998 – 2000.
*Other brands and names are the property of their respective owners.
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Contents
1.0
2.0
Introduction
.................................................................................................................. 1
1.1
2.1
2.2
Product Overview .................................................................................................. 2
Package Pinouts ................................................................................................... 3
Block Organization ................................................................................................ 7
2.2.1 Parameter Blocks ..................................................................................... 7
2.2.2 Main Blocks .............................................................................................. 7
Bus Operation ....................................................................................................... 7
3.1.1 Read......................................................................................................... 7
3.1.2 Output Disable.......................................................................................... 8
3.1.3 Standby .................................................................................................... 8
3.1.4 Reset ........................................................................................................8
3.1.5 Write ......................................................................................................... 9
Modes of Operation............................................................................................... 9
3.2.1 Read Array ............................................................................................... 9
3.2.2 Read Configuration ................................................................................10
3.2.3 Read Status Register .............................................................................10
3.2.4 Read Query ............................................................................................11
3.2.5 Program Mode........................................................................................11
3.2.6 Erase Mode ............................................................................................12
Flexible Block Locking.........................................................................................15
3.3.1 Locking Operation ..................................................................................16
3.3.2 Unlocked State .......................................................................................16
3.3.3 Lock-Down State ....................................................................................16
3.3.4 Reading a Block’s Lock Status ...............................................................17
3.3.5 Locking Operations during Erase Suspend............................................17
3.3.6 Status Register Error Checking..............................................................17
128-Bit Protection Register .................................................................................18
3.4.1 Reading the Protection Register ............................................................18
3.4.2 Programming the Protection Register ....................................................19
3.4.3 Locking the Protection Register .............................................................19
V
PP
Program and Erase Voltages .......................................................................19
3.5.1 Improved 12 Volt Production Programming ...........................................19
3.5.2 VPP £ VPPLK for Complete Protection..................................................20
Power Consumption ............................................................................................20
3.6.1 Active Power (Program/Erase/Read) .....................................................20
3.6.2 Automatic Power Savings (APS)............................................................21
3.6.3 Standby Power .......................................................................................21
3.6.4 Deep Power-Down Mode .......................................................................21
Power-Up/Down Operation .................................................................................21
3.7.1 RP# Connected to System Reset...........................................................21
3.7.2 VCC, VPP and RP# Transitions .............................................................22
Power Supply Decoupling ...................................................................................22
Product Description
.................................................................................................. 3
3.0
Principles of Operation
............................................................................................ 7
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
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4.0
Electrical Specifications
........................................................................................ 23
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
Absolute Maximum Ratings ................................................................................ 23
Operating Conditions .......................................................................................... 24
Capacitance ........................................................................................................ 24
DC Characteristics .............................................................................................. 25
DC Characteristics, Continued............................................................................ 26
AC Characteristics—Read Operations................................................................ 28
AC Characteristics—Write Operations................................................................ 33
Erase and Program Timings ............................................................................... 37
Reset Operations ................................................................................................ 39
5.0
6.0
Ordering Information
.............................................................................................. 40
Additional Information
........................................................................................... 41
WSM Current/Next States
................................................................................ 42
Program/Erase Flowcharts
............................................................................. 44
Common Flash Interface Query Structure
............................................... 50
Architecture Block Diagram
........................................................................... 57
Word-Wide Memory Map Diagrams
............................................................. 58
Device ID Table
.................................................................................................... 62
Protection Register Addressing
................................................................... 63
Appendix A
Appendix B
Appendix C
Appendix D
Appendix E
Appendix F
Appendix G
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Revision History
Date of
Revision
05/12/98
Version
-001
Original version
48-Lead TSOP package diagram change
µBGA
package diagrams change
32-Mbit ordering information change (Section 6)
CFI Query Structure Output Table Change (Table C2)
CFI Primary-Vendor Specific Extended Query Table Change for Optional
Features and Command Support change (Table C8)
Protection Register Address Change
I
PPD
test conditions clarification (Section 4.3)
µBGA
package top side mark information clarification (Section 6)
Byte-Wide Protection Register Address change
V
IH
Specification change (Section 4.3)
V
IL
Maximum Specification change (Section 4.3)
I
CCS
test conditions clarification (Section 4.3)
Added Command Sequence Error Note (Table 7)
Datasheet renamed from
3 Volt Advanced Boot Block, 8-, 16-, 32-Mbit Flash
Memory Family.
Added t
BHWH
/t
BHEH
and t
QVBL
(Section 4.6)
Programming the Protection Register clarification (Section 3.4.2)
Removed all references to x8 configurations
Removed reference to 40-Lead TSOP from front page
Added Easy BGA package (Section 1.2)
Removed 1.8 V I/O references
Locking Operations Flowchart
changed (Appendix B)
Added t
WHGL
(Section 4.6)
CFI Primary Vendor-Specific Extended Query changed (Appendix C)
Max I
CCD
changed to 25 µA
Table 10, added note indicating V
CC
Max = 3.3 V for 32-Mbit device
Added specifications for 0.18 micron product offerings throughout document
Added 64-Mbit density
Changed references of 32Mbit 80ns devices to 70ns devices to reflect the
faster product offering.
10/12/00
-010
Changed VccMax=3.3V reference to indicate that the affected product is the
0.25µm 32Mbit device.
Minor text edits throughout document.
Description
07/21/98
-002
10/03/98
-003
12/04/98
12/31/98
02/24/99
-004
-005
-006
06/10/99
-007
03/20/00
04/24/00
-008
-009
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