QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 704
LT3023
DESCRIPTION
Demonstration circuit 704 is a dual output regulator
based on the LT3023 IC, which consists of two iden-
tical LDO linear regulators. The DC704 has an input
voltage range of 2.3V to 20V, and either output is ca-
pable of delivering up to 100mA of output current.
The DC supply current is typically only 20uA (per
channel) at no load. The LT3023 comes in a small
10-pin DFN package, which has an exposed pad on
the bottom-side of the IC for better thermal perform-
ance. DC704 comes installed with ceramic capaci-
tors, because of the LT3023 ability of maintaining
stability with ceramic output capacitors. There are
ceramic bypass capacitors on each output for extra
low noise performance. These features make the
DC704 an ideal circuit for use in battery-powered,
hand-held applications or noise sensitive applica-
tions.
Design files for this circuit are available. Call the
LTC Factory.
DUAL OUTPUT LOW NOISE LDO REGULATORS
QUICK START PROCEDURE
DC704 is easy to set up to evaluate the performance
of the LT3023. Refer to Figure 1 for proper meas-
urement equipment setup and follow the procedure
outlined below for proper operation.
1.
Connect the input power supply to the VIN
and GND terminals. Connect the loads be-
tween the VOUT and GND terminals.
Before proceeding to operation, insert jump-
ers JP3 and JP4 into the OFF positions, jump-
ers JP1 and JP2 into the voltage options of
choice (2.5V, 3.3V, and 5V).
Apply 6.5V at VIN. Measure both VOUT1 and
VOUT2; they should read 0V.
Turn on VOUT1 and VOUT2 by moving jump-
ers JP3 and JP4 from the OFF position to the
ON position. Both output voltages should be
within a tolerance of +/- 2%.
Vary the input voltage from 6.5V to 20V. Both
output voltages should be within +/- 3.3% tol-
erance.
6.
Vary each load current from 0 to 100mA.
Both output voltages should be within a toler-
ance of +/- 4%.
Observe both output voltages AC-coupled;
they should measure noise voltages of less
than 2mVAC each. Refer to Figure 2 for
proper measurement technique.
When finished, move jumpers JP3 and JP4 to
the OFF position and disconnect the power.
7.
8.
2.
3.
4.
5.
Warning - if long leads are used to power the demo
circuit, the input voltage at the part could “ring”,
which could affect the operation of the circuit or even
exceed the maximum voltage rating of the IC. To
eliminate the ringing, insert a small tantalum capaci-
tor (for instance, an AVX part # TAJW106M025R) on
the pads between the input power and return termi-
nals on the bottom of the demo board. The (greater)
ESR of the tantalum will dampen the (possible) ring-
ing voltage due to the use of long input leads. On a
normal, typical PCB, with short traces, the capacitor
is not needed.
1
5
4
3
2
1
E1
VIN
2.3V-20V
E2
GND
D
D
VIN
+
CIN1A
10UF,25V
6032
*
CIN1
1UF,25V
1206
ON
1
RSD1
1M
OFF
3
OFF
3
ON
1
RSD2
1M
2
JP3
VOUT1
JP4
VOUT2
U1
LT3023EDD
SHDN2 9
VOUT2 10
BYP2 1
ADJ2 2
CBYP2
0.01UF
R2
255K
C
VOUT1
100mA
GND
E3
E4
7
VOUT1
6
SHDN1
VOUT1
BYP1
ADJ1
VIN
C
8
2
VOUT2
COUT2
+
COUT2A
10UF,6.3V
0805
100UF,10V
7343
OPT
E5
E6
E7
+
COUT1A
GND
100UF,10V
7343
OPT
COUT1
10UF,6.3V
0805
R1
255K
CBYP1
0.01UF
5
4
VOUT2
100mA
GND
GND
2
4
6
8
3
2
4
4
6
6
2
4
6
8
2
JP1
8
7
7
8
JP2
1
3
5
7
1
1
3
3
1
3
5
7
USER
SELECT
B
5
5
5V
R4
82.5K
3.3V
R5
150K
2.5V
R6
243K
2.5V
R7
243K
3.3V
R8
150K
5V
R9
82.5K
USER
SELECT
R10
TBD
B
R3
TBD
NOTES: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE IN OHMS, 0402.
ALL CAPACITORS ARE IN MICROFARADS, 0402.
2. INSTALL SHUNTS ON JP1 AND JP2 PIN 3 AND 4; JP3 AND JP4 PIN 1 AND 2.
A
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
3
CONTRACT NO.
APPROVALS
DRAWN:
CHECKED:
APPROVED:
ENGINEER: TOM G.
DESIGNER:
KIM T.
TECHNOLOGY
TITLE:
SCHEMATIC
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
A
*
CIN1A IS AN OPTIONAL CAPACITOR. IT WAS INSERTED ON THE
DC704A TO DAMPEN THE (POSSIBLE) RINGING VOLTAGE DUE TO
THE USE OFLONG INPUT LEADS. ON A NORMAL, TYPICAL PCB,
WITH SHORT TRACES, CIN1A IS NOT NEEDED.
5
4
DUAL OUTPUT LOW NOISE LDO REGULATORS
SIZE
DWG NO.
A
DATE:
2
DC704A * LT3023EDD
SHEET 1
1
REV
A
OF 1
Monday, January 05, 2004
Linear Technology Corporation
LT3023EDD
DUAL OUTPUT LOW NOISE LDO REGULATORS
ENG: TOM GROSS (23-30)
BILL OF MATERIALS
DC704A
6/20/2005
10:06 AM
Item
Qty Reference
Part Description
Manufacture / Part #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
1
1
0
2
7
2
2
4
2
2
0
2
2
2
1
CBYP2,CBYP1
CIN1
CIN1A
COUT1A,COUT2A
COUT2,COUT1
E1-E7
JP1,JP2
JP3,JP4
SHUNTS FOR JP1-JP4
RSD2,RSD1
R1,R2
R10,R3
R9,R4
R5,R8
R7,R6
U1
CAP., X7R, 0.01UF 16V, 20%, 0402
CAP., X7R, 1UF 25V, 20%, 1206
CAP., TANT 10UF 25V, 20%, 6032
CAP., TANT 100UF 10V, 7343
CAP., X5R, 10UF 6.3V, 20%, 0805
TESTPOINT, TURRET, .094"
JMP, 2X4, .079CC, HD2X4-079
HEADER, 3PIN 1 ROW .079CC
SHUNT, .079" CENTER
RES., CHIP 1M 1/16W 5%,0402
RES., CHIP 255K 1/16W 1%,0402
RES., CHIP, 0402
RES., CHIP 82.5K 1/16W 1%,0402
RES., CHIP 150K 1/16W 1%,0402
RES., CHIP 243K 1/16W 1%,0402
I.C., LT3023EDD,DFN10DD
AVX, 0402YC103MAT
AVX, 12063C105MAT
AVX, TAJW106M025R
AVX, TPSD107M010R0100 OPT
TAIYO YUDEN, JMK212BJ106MG-T
MILL-MAX, 2501-2
COMM-CON, 2202S-08-G2
COMM-CON, 2802S-03-G1
COMM-CON CCIJ2MM-138G
AAC, CR05-105JM
AAC, CR05-2553FM
TBD
AAC, CR05-8252FM
AAC, CR05-1503FM
AAC, CR05-2433FM
LINEAR TECH., LT3023EDD
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