Si306x
G
L O B A L
L
I N E
-S
I D E
D A A
F O R
E
M B E D D E D
S
Y S T E M
-S
I D E
M
O D U L E
Features
Complete DAA includes the following:
80 dB dynamic range TX/RX paths to
support up to V.92 modem speeds
Programmable line interface
AC termination
DC termination
Ring detect threshold
Ringer impedance
Integrated codec and 2- to 4-wire
analog hybrid
Integrated ring detector
Pulse dialing support
Billing tone detection
Overload detection
> 5000 V isolation
Proprietary isolation interface to
integrated DAA module
Line voltage monitor
Loop current monitor
Caller ID support
Low-profile SOIC available in lead-
free/ROHS-compliant packages
Ordering Information
See page 59.
Pin Assignments
Si306x
QE
DCT
RX
IB
C1B
C2B
VREG
RNG1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
Applications
V.92 soft modems
PDAs
Set-top boxes
Fax machines
POS terminals
Multi-function
Printers
Description
The Si306x is an integrated direct access arrangement (DAA) with a
programmable line interface to meet global telephone line interface
requirements. Available in a 16-pin small outline package, it eliminates
the need for an analog front end (AFE), an isolation transformer, relays,
opto-isolators, and a 2- to 4-wire hybrid. The Si306x dramatically reduces
the number of discrete components and cost required to achieve
compliance with global regulatory requirements. The Si306x interfaces
directly to a Silicon Laboratories integrated DAA system-side module.
US Patent # 5,870,046
US Patent # 6,061,009
Other Patents Pending
Functional Block Diagram
Si306x
RX
IB
SC
DCT
VREG
VREG2
DCT2
DCT3
RNG1
RNG2
QB
QE
QE2
Silicon
Laboratories
Embedded
System-side
DAA Module
Hybrid and
dc
Termination
Isolation
Interface
Ring Detect
Off-Hook
Rev. 0.9 1/05
Copyright © 2005 by Silicon Laboratories
Si306x
Si306x
T
A B L E
Section
OF
C
O N T E N TS
Page
1. Si306x Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5. AOUT PWM Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.1. Line-Side Device Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.2. Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3. Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
6.4. Isolation Barrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.5. Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.6. Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.7. In-Circuit Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
6.8. Exception Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.9. Revision Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.10. Parallel Handset Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.11. Line Voltage/Loop Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.12. Off-Hook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.13. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.14. DC Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.15. AC Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.16. Transhybrid Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.17. Ring Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.18. Ring Validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
6.19. Ringer Impedance and Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.20. Pulse Dialing and Spark Quenching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.21. Billing Tone Detection and Receive Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.22. Billing Tone Filter (Optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.23. On-Hook Line Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.24. Caller ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.25. Overload Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
6.26. Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
6.27. Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7. Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Appendix—UL1950 3rd Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
8. Pin Descriptions: Si306x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
9. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
10. Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
11. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Rev. 0.9
3
Si306x
Table 2. Loop Characteristics
(V
D
= 3.0 to 3.6 V, T
A
= 0 to 70 °C for F/K-Grade,
see
Figure 1)
Parameter
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
On Hook Leakage Current
Operating Loop Current
Operating Loop Current
DC Ring Current
Ring Detect Voltage*
Ring Detect Voltage*
Ring Frequency
Ringer Equivalence Number
Symbol
V
TR
V
TR
V
TR
V
TR
V
TR
V
TR
I
LK
I
LP
I
LP
V
RD
V
RD
F
R
REN
Test Condition
I
L
= 20 mA, MINI = 11,
ILIM = 0, DCV = 00, DCR = 0
I
L
= 120 mA, MINI = 11,
ILIM = 0, DCV = 00, DCR = 0
I
L
= 20 mA, MINI = 00,
ILIM = 0, DCV = 11, DCR = 0
I
L
= 120 mA, MINI = 00,
ILIM = 0, DCV = 11, DCR = 0
I
L
= 20 mA, MINI = 00,
ILIM = 1, DCV = 11, DCR = 0
I
L
= 60 mA, MINI = 00,
ILIM = 1, DCV = 11, DCR = 0
V
TR
= –48 V
MINI = 00, ILIM = 0
MINI = 00, ILIM = 1
RT = 0
RT = 1
Min
—
9
—
9
—
40
—
10
10
—
13.5
19.35
15
—
Typ
—
—
—
—
—
—
—
—
—
1.5
15
21.5
—
—
Max
6.0
—
7.5
—
7.5
—
3
120
60
3
16.5
23.65
68
0.2
Unit
V
V
V
V
V
V
µA
mA
mA
µA
V
rms
V
rms
Hz
*Note:
The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected
above the maximum.
TIP
+
600
Ω
DAA
V
TR
Line-side
Device
–
I
L
10
µF
RING
Figure 1. Test Circuit for Loop Characteristics
Rev. 0.9
5
FPGA/CPLD
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