Freescale Semiconductor
Product Brief
Document Number:KL1xPB
Rev 3.2, 12/2013
Supports all KL14, KL15 devices
KL14/KL15 Product Brief
Contents
1 Kinetis L series
The Kinetis L series is the most scalable portfolio of ultra low-
power, mixed-signal ARM
®
Cortex
®
-M0+ MCUs in the
industry. The portfolio includes five MCU families that offer a
broad range of memory, peripheral and package options.
Kinetis L Series families share common peripherals and pin-
counts allowing developers to migrate easily within an MCU
family or between MCU families to take advantage of more
memory or feature integration. This scalability allows
developers to standardize on the Kinetis L Series for their end
product platforms, maximising hardware and software reuse
and reducing time-to-market.
Features common to all Kinetis L series families include:
• 48 MHz ARM Cortex-M0+ core
• High-speed 12/16-bit analog-to-digital converters
• 12-bit digital-to-analog converters for all series except
for KLx4/KLx2 family
• High-speed analog comparators
• Low-power touch sensing with wake-up on touch from
reduced power states for all series except for KLx4/
KLx2 family
• Powerful timers for a broad range of applications
including motor control
• Low-power focused serial communication interfaces
such as low-power UART, SPI, I2C, and others.
• Single power supply: 1.71–3.6 V with multiple low-
power modes support single operation temperature:
© 2012–2013 Freescale Semiconductor, Inc.
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Kinetis L series..........................................................1
KL14/KL15 sub-family introduction........................3
Block diagram...........................................................4
Features.....................................................................7
Power modes...........................................................18
Revision history......................................................20
Kinetis L series
• –40 ~ 105 °C (exclude WLCSP package)
• –40 ~ 85 °C (WLCSP package)
Kinetis L series MCU families combine the latest low-power innovations with precision mixed-signal capability and a broad
range of communication, connectivity, and human-machine interface peripherals. Each MCU family is supported by a
market-leading enablement bundle from Freescale and numerous ARM third party ecosystem partners. The KL0x family is
the entry-point to the Kinetis L series and is pin-compatible with the 8-bit S08PT family. The KL1x/2x/3x/4x families are
compatible with each other and their equivalent ARM Cortex-M4 Kinetis K series families—K10/20/30/40.
The following figure depicts key features, memory and package options for Kinetis L series family of MCUs.
Family
Program
Flash
Packages
64-121pin
64-121pin
32-121pin
32-80pin
16-48pin
Mixed signal
Key Features
KL4x Family
128-256KB
KL3x Family
64-256KB
KL2x Family
32-256KB
KL1x Family
32-256KB
KL0x Family
8-32KB
Low power
USB
Segment LCD
Figure 1. Kinetis L series families of MCU portfolio
All Kinetis L series families include a powerful array of analog, communication and timing and control peripherals with the
level of feature integration increasing with flash memory size and the pin count. Features within the Kinetis L series families
include:
• Core and architecture:
• ARM Cortex-M0+ Core running up to 48 MHz with zero wait state execution from memories
• Single-cycle access to I/O: Up to 50 percent faster than standard I/O, improves reaction time to external
events allowing bit banging and software protocol emulation
• Two-stage pipeline: Reduced number of cycles per instruction (CPI), enabling faster branch instruction and
ISR entry, and reducing power consumption
• Excellent code density as compared to 8-bit and 16-bit MCUs: Reduces flash size, system, cost and power
consumption
• Optimized access to program memory: Accesses on alternate cycles reduces power consumption.
• 100 percent compatible with ARM Cortex-M0 and a subset ARM Cortex-M3/M4: Reuse existing
compilers and debug tools.
• Simplified architecture: 56 instructions and 17 registers enable easy programming and efficient packaging
of 8/16/32-bit data in memory.
• Linear 4 GB address space removes the need for paging/banking, reducing software complexity.
• ARM third-party ecosystem support: Software and tools to help minimize development time/cost
• Micro Trace Buffer: Lightweight trace solution allows fast bug identification and correction.
KL14/KL15 Product Brief, Rev 3.2, 12/2013
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Freescale Semiconductor, Inc.
KL14/KL15 sub-family introduction
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•
•
•
•
•
•
•
• Bit Manipulation Engine (BME): BME reduces code size and cycles for bit-oriented operations to peripheral
registers eliminating traditional methods where the core would need to perform read-modify-write operations.
• Up to 4-channel DMA for peripheral and memory servicing with minimal CPU intervention (feature not available
on KL02 family)
Ultra low-power:
• Extreme dynamic efficiency: 32-bit ARM Cortex-M0+ core combined with Freescale 90 nm thin-film storage
flash technology delivers 50% energy savings per Coremark in comparison to the closest 8/16-bit competitive
solution.
• Multiple flexible low-power modes, including new operation clocking option which reduces dynamic power by
shutting off bus and system clocks for lowest power core processing. Peripherals with an alternate asynchronous
clock source can continue operation.
• UART, SPI, I2C, ADC, DAC, TPM, LPTMR, and DMA support low-power mode operation without waking up
the core (DMA is not available on KL02).
Memory:
• Scalable memory footprints from 8 KB flash / 1 KB SRAM to 256 KB flash / 32 KB SRAM
• Embedded 64 B cache memory for optimizing bus bandwidth and flash execution performance (32 B cache on
KL02 family)
Mixed-signal analog:
• Fast, high-precision 16-, or 12-bit ADC with optional differential pairs, 12-bit DAC, high-speed comparators.
• Powerful signal conditioning, conversion, and analysis capability with reduced system cost (12-bit DAC not
available on KL02 family)
Human Machine Interface (HMI):
• Optional capacitive Touch Sensing Interface with full low-power support and minimal current adder when
enabled
• Segment LCD controller
Connectivity and communications:
• Up to three UARTs:
• All UARTs support DMA transfers, and can trigger when data on bus is detected;
• UART0 supports 4x to 32x over sampling ratio;
• Asynchronous transmit and receive operation for operating in STOP/VLPS modes.
• Up to two SPIs
• Up to two I
2
Cs
• Full-speed USB OTG controller with on-chip transceiver
• 3.3–5 V USB on-chip regulator
• Up to one I
2
S
Reliability, safety, and security:
• Internal watchdog with independent clock source
Timing and control:
• Powerful timer modules which support general-purpose, PWM, and motor control functions
• Periodic Interrupt Timer for RTOS task scheduler time base or trigger source for ADC conversion and timer
modules
System:
• GPIO with pin interrupt functionality
• Wide operating voltage range from 1.71 V to 3.6 V with flash programmable down to 1.71 V with fully
functional flash and analog peripherals
• Ambient operating temperature ranges from –40 °C to
The device is highly-integrated, market leading ultra low-power 32-bit microcontroller based on the enhanced Cortex-M0+
(CM0+) core platform. The features of the KL1x family derivatives are as follows.
• Core platform clock up to 48 MHz, bus clock up to 24 MHz
• Memory option is up to 256 KB flash and 32 KB RAM
KL14/KL15 Product Brief, Rev 3.2, 12/2013
Freescale Semiconductor, Inc.
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2 KL14/KL15 sub-family introduction
Block diagram
• Wide operating voltage ranges from 1.71–3.6 V with fully functional flash program/erase/read operations
• Ambient operating temperature ranges from –40 °C to 85 °C for WLCSP package and –40 °C to 105 °C for all the
others.
The family acts as an ultra low-power, cost-effective microcontroller to provide developers an appropriate entry-level 32-bit
solution. The family is the next-generation MCU solution for low-cost, low-power, high-performance devices applications.
It’s valuable for cost-sensitive, portable applications requiring long battery life-time.
3 Block diagram
The following figure shows a superset block diagram of the device. Other devices within the family have a subset of the
features.
KL14/KL15 Product Brief, Rev 3.2, 12/2013
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Freescale Semiconductor, Inc.
Block diagram
Kinetis KL14 Family
ARM Cortex-M0+
Core
Debug
interfaces
Interrupt
controller
MTB
System
Internal
watchdog
Memories and
Memory Interfaces
Program
flash
Clocks
Phase-
locked loop
Frequency-
locked loop
Low/high
frequency
oscillator
DMA
RAM
BME
Internal
reference
clocks
and Integrity
Internal
watchdog
Security
Analog
12-bit ADC
x1
Timers
Timers
1x6ch+2x2ch
Low
power timer
x1
Communication
Interfaces
I
C
x2
Low power
UART
x1
SPI
x2
UART
x2
2
Human-Machine
Interface (HMI)
GPIOs
with
interrupt
Analog
comparator
x1
6-bit DAC
Periodic
interrupt
timers
RTC
LEGEND
Migration difference from KL04 family
Figure 2. KL14 family block diagram
KL14/KL15 Product Brief, Rev 3.2, 12/2013
Freescale Semiconductor, Inc.
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