FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
ICS840001
G
ENERAL
D
ESCRIPTION
The ICS840001 is a Fibre Channel Clock Generator
and a member of the HiPerClocks
TM
family of high
HiPerClockS™
performance devices from IDT. The ICS840001 uses
a 26.5625MHz cr ystal to synthesize either
106.25MHz or 212.5MHz, using the FREQ_SEL pin.
The ICS840001 has excellent phase jitter performance, over the
637kHz – 10MHz integration range. The ICS840001 is packaged
in a small 8-pin TSSOP, making it ideal for use in systems with
limited board space.
F
EATURES
•
One LVCMOS/LVTTL output, 7Ω typical output impedence
•
Crystal oscillator interface designed for 26.5625MHz,
18pF parallel resonant crystal
•
Selectable 106.25MHz or 212.5MHz output frequency
•
VCO range: 560MHz to 680MHz
•
RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal
(637kHz - 10MHz): 0.696ps (typical)
•
RMS phase noise at 106.25MHz (typical)
Phase noise:
Offset
Noise Power
100Hz ............... -94.4 dBc/Hz
1kHz ............. -119.9 dBc/Hz
10kHz ............. -130.2 dBc/Hz
100kHz ............. -131.5 dBc/Hz
•
3.3V operating supply
•
-30°C to 85°C ambient operating temperature
•
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
F
UNCTION
T
ABLE
Input
FREQ_SEL
0
1
Crystal: 26.5625MHz
Output Frequencies
106.25MHz (Default)
212.5MHz
B
LOCK
D
IAGRAM
OE
FREQ_SEL
(Pullup)
(Pulldown)
P
IN
A
SSIGNMENT
V
DDA
OE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
DD
Q0
GND
FREQ_SEL
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
637.5MHz w/
26.5625MHz Ref.
÷3
1
Q0
ICS840001
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
÷6
0
M = ÷24 (fixed)
IDT
™
/ ICS
™
LVCMOS/LVTTL CLOCK GENERATOR
1
ICS840001BG REV. A JUNE 13, 2007
ICS840001
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2
3, 4
5
6
7
8
Name
V
DDA
OE
XTAL_OUT,
XTAL_IN
FREQ_SEL
GND
Q0
V
DD
Power
Input
Input
Input
Power
Output
Power
Type
Description
Analog supply pin.
Output enable pin. When HIGH, Q0 output is enabled.
Pullup
When LOW, forces Q0 to Hi-Z state. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
Pulldown Frequency select pin. LVCMOS/LVTTL interface levels.
Power supply ground.
Single-ended clock output. LVCMOS/LVTTL interface levels.
7Ω typical output impedance.
Core supply pin.
NOTE:
Pullup
and
Pulldown
refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
C
PD
R
PULLUP
R
PULLDOWN
R
OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
5
V
DD
, V
DDA
= 3.465V
Test Conditions
Minimum
Typical
4
24
51
51
7
12
Maximum
Units
pF
pF
kΩ
kΩ
Ω
T
ABLE
3. C
ONTROL
F
UNCTION
T
ABLE
Control Inputs
OE
0
1
Output
Q0
Hi-Z
Active
IDT
™
/ ICS
™
LVCMOS/LVTTL CLOCK GENERATOR
2
ICS840001BG REV. A JUNE 13, 2007
ICS840001
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
DD
+ 0.5 V
-0.5V to V
DDO
+ 0.5V
101.7°C/W (0 mps)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDA
= 3.3V±5%, T
A
= -30°C
TO
85°C
Symbol
V
DD
V
DDA
I
DD
I
DDA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
80
10
Units
V
V
mA
mA
T
ABLE
4B. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
DD
= V
DDA
= 3.3V±5%, T
A
= -30°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
I
IL
V
OH
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
FREQ_SEL
OE
FREQ_SEL
OE
V
DD
= V
IN
= 3.465V
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
V
DD
= 3.465V, V
IN
= 0V
-5
-150
2.6
0.5
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
DD
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
V
V
Output High Voltage; NOTE 1
V
OL
Output Low Voltage; NOTE 1
NOTE 1: Outputs terminated with 50
Ω
to V
DD
/2. See Parameter Measurement Information Section,
"3.3V Output Load Test Circuit".
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Test Conditions
Minimum
Typical
Fundamental
26.5625
50
7
MHz
Ω
pF
Maximum
Units
IDT
™
/ ICS
™
LVCMOS/LVTTL CLOCK GENERATOR
3
ICS840001BG REV. A JUNE 13, 2007
ICS840001
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
T
ABLE
6. AC C
HARACTERISTICS
,
V
DD
= V
DDA
= 3.3V±5%, T
A
= -30°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
Test Conditions
FREQ_SEL = 1
FREQ_SEL = 0
fOUT = 106.25MHz,
(637kHz to 10MHz)
fOUT = 212.5MHz,
(2.55MHz to 20MHz)
20% to 80%
Minimum
186.66
93.33
Typical
212.5
106.25
0.696
0.458
250
48
45
600
52
55
Maximum
226.66
113.33
Units
MHz
MHz
ps
ps
ps
%
%
t
jit(Ø)
t
R
/ t
F
odc
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
fOUT = 106.25MHz
fOUT = 212.5MHz
All parameters are characterized @ 212.5MHz and 106.25MHz.
NOTE 1: Please refer to the Phase Noise Plots.
IDT
™
/ ICS
™
LVCMOS/LVTTL CLOCK GENERATOR
4
ICS840001BG REV. A JUNE 13, 2007
ICS840001
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
T
YPICAL
P
HASE
N
OISE AT
106.25MH
Z
-10
-20
-30
-40
-50
➤
Fibre Channel Filter
106.25MHz
RMS Phase Jitter (Random)
637k to 10MHz = 0.696ps (typical)
0
N
OISE
P
OWER
dBc
Hz
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
100k
Raw Phase Noise Data
➤
T
YPICAL
P
HASE
N
OISE AT
212.5MH
Z
-10
-20
-30
-40
-50
➤
Phase Noise Result by adding
Fibre Channel Filter to raw data
1M
10M
100M
O
FFSET
F
REQUENCY
(H
Z
)
Fibre Channel Filter
212.5MHz
RMS Phase Jitter (Random)
2.55MHz to 20MHz = 0.458ps
N
OISE
P
OWER
dBc
Hz
-60
-70
-80
-90
-100
Raw Phase Noise Data
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
Phase Noise Result by adding
Fibre Channel Filter to raw data
100k
1M
10M
100M
10k
O
FFSET
F
REQUENCY
(H
Z
)
IDT
™
/ ICS
™
LVCMOS/LVTTL CLOCK GENERATOR
5
➤
0
➤
➤
ICS840001BG REV. A JUNE 13, 2007
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