LV55K Series 3.3 V
LVDS Clock Oscillators
April 2016
Preliminary
• Pletronics’ LV55K Series is a quartz crystal
controlled precision square wave generator with
LVDS output.
• Im proved phase noise perform ance.
• Tape and Reel or cut tape packaging is available.
• 3.2 x 5 m m LCC Ceram ic Package
• Enable/Disable Function on pad 1
• Disable function includes low standby power
m ode
• 3
rd
Overtone Crystals used
• Im proved circuit to m inim ize oscillator issues
such as m ulti-m ode output signal.
• Lowest Jitter Product
* BEST OPTION FOR LOW JITTER REQUIREMENTS
50 fS Jitter 12.0 KHz to 20.0 MHz @156.25 MHz
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2011/65/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadm ium , Hexavalent Chrom ium , Lead, Mercury, PBB’s, PBDE’s
W eight of the Device: 0.09 gram s
Moisture Sensitivity Level: 1 As defined in J-STD-020D.1
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
V
CC
Supply Voltage
Vi
Vo
Input Voltage
Output Voltage
Unit
-0.5V to +4.6V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Thermal Characteristics
The m axim um die or junction tem perature is 125
o
C
The therm al resistance junction to board is 30 to 50
o
C/W att depending on the solder pads, ground plane
and construction of the PCB.
P roduct inform ation is current as of publication date. T he product conform s
to specifications per the term s of the P letronics standard warranty. Production
processsing does not necessarily include testing of all param eters.
Copyright © 2011, Pletronics Inc.
LV55K Series 3.3 V
LVDS Clock Oscillators
April 2016
Part Number:
LV55
45
K
E
V
-125.0M
-XX
Available
Frequencies:
100.0M Hz
106.25M Hz
125.0M Hz
133.0M Hz
156.25M Hz
Packaging code or blank
T250
= 250 per Tape and Reel
T500
= 500 per Tape and Reel
T1K
= 1000 per Tape and Reel
Frequency in M Hz
Supply Voltage V
CC
V
= 3.3V _ 10%
+
Optional Enhanced OTR
Blank
= Tem p. range -10 to +70
o
C
C
= Tem p. range -20 to +70
o
C
E
= Tem p. range -40 to +85
o
C
Series M odel
Frequency Stability
45
= + 50 ppm
_
44
= + 25 ppm
_
20
= + 20 ppm
_
Series M odel
Part M arking:
PFF.FFL
C
YMDXXX
M arking Legend:
P
= Pletronics
L
= LVDS
FF.FF
= Frequency in MHz
YMD
= Date of Manufacture (year-m onth-day)
All other m arking is internal factory codes
Contact factory
for other options
Specifications such as frequency stability, supply voltage and operating tem perature range, etc. are
not identified from the m arking. External packaging labels and packing list will correctly identify the
ordered Pletronics part num ber.
Codes for Date Code YM D
Code
4
Code
A
5
6
7
8
B
C
D
E
F
G
H
J
K
L
M
Year
2014 2015 2016 2017 2018
Month
JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC
Code
Day
Code
Day
1
1
H
17
2
2
J
18
3
3
K
19
4
4
L
20
5
5
M
21
6
6
N
22
7
7
P
23
8
8
R
24
9
9
T
25
A
10
U
26
B
11
V
27
C
12
W
28
D
13
X
29
E
14
Y
30
F
15
Z
31
G
16
www.pletronics.com
425-776-1880
2
LV55K Series 3.3 V
LVDS Clock Oscillators
April 2016
Electrical Specification for 3.30V +5% over the specified temperature range and
_
the frequency range of 100.0 to 212.50 MHz
Item
Frequency Accuracy “45"
“44"
“20"
Output Waveform
Output High Level
Output Low Level
Output Symmetry
Jitter
1
Output T
RISE
and T
FALL
V
CC
Supply Current (I
CC
)
Enable/Disable Internal Pull-up
V disable
V enable
Output leakage Current
Enable time
-
0.90
45
-
-
-
30
-
80
-10
-
1.43
1.10
-
50
0.3
28
-
-
-
-
-
Min
-50
-25
-20
Typ
-
-
-
Max
+50
+25
+20
LVDS
1.60
-
55
-
1.0
45
150
20
-
+10
2
V
V
%
pS RMS
nS
mA
Kohm
%Vcc
%Vcc
:A
mS
Time for output to reach a logic state, the
output frequency is correct at the specified
Start Time.
Time for output to reach a high Z state
Time for output to reach specified
frequency
Standard Temperature Range
Extended Temperature Range
Option
Extended Temperature Range
Option
“C”
“E”
at 50% point of V
CC
(See load circuit)
Unit
ppm
Condition
For all supply voltages, load changes,
aging for 1 year, shock, vibration and
temperatures
12 KHz to 20 MHz from the output
frequency @156.25 MHz
Vth is 20% and 80% of waveform
Disable time
Start up time
Operating Temperature Range
-
-
-10
- 20
- 40
-
-
-
-
-
-
200
3
+70
+70
+85
+125
nS
mS
o
o
C
C
C
C
o
Storage Temperature Range
-55
o
Standby Current I
CC
-
-
15
uA
Pad 1 low, device disabled
1
Jitter computed from phase noise data at 156.25MHz
Specifications with Pad 1 E/D open circuit unless stated otherwise
Typical Phase Noise
www.pletronics.com
425-776-1880
3
LV55K Series 3.3 V
LVDS Clock Oscillators
April 2016
Load Circuit
Test Waveform
www.pletronics.com
425-776-1880
4
LV55K Series 3.3 V
LVDS Clock Oscillators
April 2016
Reliability
:
Parameter
Environmental Com pliance
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
Mechanical Shock
Vibration
Solderability
Thermal Shock
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
www.pletronics.com
425-776-1880
5
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