Freescale Semiconductor
Technical Data
Document Number: MRF7S21210H
Rev. 2, 3/2011
RF Power Field Effect Transistors
N--Channel Enhancement--Mode Lateral MOSFETs
Designed for CDMA base station applications with frequencies from 2110 to
2170 MHz. Can be used in Class AB and Class C for all typical cellular base
station modulation formats.
•
Typical Single--Carrier W--CDMA Performance: V
DD
= 28 Volts, I
DQ
=
1400 mA, P
out
= 63 Watts Avg., f = 2167.5 MHz, IQ Magnitude Clipping,
Channel Bandwidth = 3.84 MHz, Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF.
Power Gain — 18.5 dB
Drain Efficiency — 29%
Device Output Signal PAR — 5.9 dB @ 0.01% Probability on CCDF
ACPR @ 5 MHz Offset — --33 dBc in 3.84 MHz Channel Bandwidth
•
Capable of Handling 5:1 VSWR, @ 32 Vdc, 2140 MHz, 190 Watts CW
Output Power
•
Typical P
out
@ 1 dB Compression Point
≃
190 Watts CW
Features
•
100% PAR Tested for Guaranteed Output Power Capability
•
Characterized with Series Equivalent Large--Signal Impedance Parameters
•
Internally Matched for Ease of Use
•
Integrated ESD Protection
•
Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
•
Designed for Digital Predistortion Error Correction Systems
•
RoHS Compliant
•
In Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width, 13 inch Reel.
MRF7S21210HR3
MRF7S21210HSR3
2110-
-2170 MHz, 63 W AVG., 28 V
SINGLE W-
-CDMA
LATERAL N-
-CHANNEL
RF POWER MOSFETs
CASE 465-
-06, STYLE 1
NI-
-780
MRF7S21210HR3
CASE 465A-
-06, STYLE 1
NI-
-780S
MRF7S21210HSR3
Table 1. Maximum Ratings
Rating
Drain--Source Voltage
Gate--Source Voltage
Operating Voltage
Storage Temperature Range
Case Operating Temperature
Operating Junction Temperature
(1,2)
CW Operation @ T
C
= 25°C
Derate above 25°C
Symbol
V
DSS
V
GS
V
DD
T
stg
T
C
T
J
CW
Value
--0.5, +65
--6.0, +10
32, +0
--65 to +150
150
225
253
1.5
Unit
Vdc
Vdc
Vdc
°C
°C
°C
W
W/°C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 80°C, 190 W CW
Case Temperature 72°C, 63 W CW
Symbol
R
θJC
Value
(2,3)
0.33
0.37
Unit
°C/W
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955,
Thermal Measurement Methodology of RF Power Amplifiers.
Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
©
Freescale Semiconductor, Inc., 2008--2009, 2011. All rights reserved.
MRF7S21210HR3 MRF7S21210HSR3
1
RF Device Data
Freescale Semiconductor
Table 3. ESD Protection Characteristics
Test Methodology
Human Body Model (per JESD22--A114)
Machine Model (per EIA/JESD22--A115)
Charge Device Model (per JESD22--C101)
Class
1C (Minimum)
A (Minimum)
IV (Minimum)
Table 4. Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Characteristic
Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V
DS
= 65 Vdc, V
GS
= 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(V
DS
= 28 Vdc, V
GS
= 0 Vdc)
Gate--Source Leakage Current
(V
GS
= 5 Vdc, V
DS
= 0 Vdc)
On Characteristics
Gate Threshold Voltage
(V
DS
= 10 Vdc, I
D
= 513
μAdc)
Gate Quiescent Voltage
(V
DS
= 28 Vdc, I
D
= 1400 mAdc)
Fixture Gate Quiescent Voltage
(1)
(V
DD
= 28 Vdc, I
D
= 1400 mAdc, Measured in Functional Test)
Drain--Source On--Voltage
(V
GS
= 10 Vdc, I
D
= 5.13 Adc)
Dynamic Characteristics
(2)
Reverse Transfer Capacitance
(V
DS
= 28 Vdc
±
30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
Output Capacitance
(V
DS
= 28 Vdc
±
30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
Input Capacitance
(V
DS
= 28 Vdc, V
GS
= 0 Vdc
±
30 mV(rms)ac @ 1 MHz)
C
rss
C
oss
C
iss
—
—
—
2.02
257
516
—
—
—
pF
pF
pF
V
GS(th)
V
GS(Q)
V
GG(Q)
V
DS(on)
1.2
—
4
0.1
2
2.7
5.4
0.2
2.7
—
7
0.3
Vdc
Vdc
Vdc
Vdc
I
DSS
I
DSS
I
GSS
—
—
—
—
—
—
10
1
1
μAdc
μAdc
μAdc
Symbol
Min
Typ
Max
Unit
Functional Tests
(In Freescale Test Fixture, 50 ohm system) V
DD
= 28 Vdc, I
DQ
= 1400 mA, P
out
= 63 W Avg., f = 2167.5 MHz,
Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz
Channel Bandwidth @
±5
MHz Offset.
Power Gain
Drain Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Input Return Loss
G
ps
η
D
PAR
ACPR
IRL
17
26
5.5
—
—
18.5
29
5.9
--33
--15
20.5
—
—
--31
--8
dB
%
dB
dBc
dB
1. V
GG
= 2 x V
GS(Q)
. Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit
schematic.
2. Part internally matched both on input and output.
(continued)
MRF7S21210HR3 MRF7S21210HSR3
2
RF Device Data
Freescale Semiconductor
Table 4. Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
(continued)
Characteristic
IMD Symmetry @ 130 W PEP, P
out
where IMD Third Order
Intermodulation
≅
30 dBc
(Delta IMD Third Order Intermodulation between Upper and Lower
Sidebands > 2 dB)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 60 MHz Bandwidth @ P
out
= 63 W Avg.
Average Deviation from Linear Phase in 60 MHz Bandwidth
@ P
out
= 190 W CW
Average Group Delay @ P
out
= 190 W CW, f = 2140 MHz
Part--to--Part Insertion Phase Variation @ P
out
= 190 W CW,
f = 2140 MHz, Six Sigma Window
Gain Variation over Temperature
(--30°C to +85°C)
Output Power Variation over Temperature
(--30°C to +85°C)
Symbol
Min
Typ
Max
Unit
Typical Performances
(In Freescale Test Fixture, 50 ohm system) V
DD
= 28 Vdc, I
DQ
= 1400 mA, 2110--2170 MHz Bandwidth
IMD
sym
—
15
—
MHz
VBW
res
G
F
Φ
Delay
∆Φ
∆G
∆P1dB
—
—
—
—
—
—
—
60
1.2
1.1
2.5
26
0.019
0.011
—
—
—
—
—
—
—
MHz
dB
°
ns
°
dB/°C
dB/°C
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
3
V
BIAS
R1
R2
Z19
+
C1
C2
C3
Z17
C10
C11
C12
C19
V
SUPPLY
R3
RF
INPUT
Z1
Z2
Z3
C5
C6
Z18
Z4
Z5
Z6
Z7
Z8
DUT
Z9
Z10 Z11 Z12 Z13
Z14 Z15
RF
C15 Z16 OUTPUT
C13
C14
Z20
+
C9
C8
C7
C16
Z11
Z12
Z13
Z14
Z15
Z16
Z17
Z18
Z19, Z20
PCB
C17
C18
C20
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
0.402″ x 0.066″ Microstrip
0.840″ x 0.076″ Microstrip
0.059″ x 0.118″ Microstrip
0.059″ x 0.118″ Microstrip
0.029″ x 0.076″ Microstrip
0.194″ x 0.076″ Microstrip
0.051″ x 0.533″ Microstrip
0.114″ x 0.533″ Microstrip
0.139″ x 1.268″ Microstrip
0.304″ x 1.201″ Microstrip
0.044″ x 0.613″ Microstrip
0.398″ x 0.102″ Microstrip
0.071″ x 0.220″ Microstrip
0.071″ x 0.220″ Microstrip
0.439″ x 0.066″ Microstrip
0.764″ x 0.066″ Microstrip
0.353″ x 0.090″ Microstrip
0.797″ x 0.090″ Microstrip
0.660″ x 0.120″ Microstrip
Taconic RF35, 0.030”,
ε
r
= 3.5
Figure 1. Test Circuit Schematic — MRF7S21210HR3
Table 5. Test Circuit Component Designations and Values — MRF7S21210HR3
Part
C1, C9, C11, C12, C17, C18
C2, C8
C3, C7, C10, C13, C14, C16
C5
C6
C15
C19, C20
R1, R2
R3
Description
10
μF,
50 V Chip Capacitors
100 nF Chip Capacitors
6.8 pF Chip Capacitors
5.6 pF Chip Capacitor
0.8 pF Chip Capacitor
0.6 pF Chip Capacitor
470
μF
Electrolytic Capacitors
10 KΩ, 1/4 W Chip Resistors
10
Ω,
1/4 W Chip Resistor
Part Number
C5750X5R1H106MT
12065C104KAT
ATC100B6R8BT500XT
ATC100B5R6BT500XT
ATC100B0R8BT500XT
ATC100B0R6BT500XT
2222 12018471
WCR120610KL
232272461009
Manufacturer
TDK
AVX
ATC
ATC
ATC
ATC
BC Components
Welwyn
Phycomp
C4 not used in MRF7S21210HR3 part.
MRF7S21210HR3 MRF7S21210HSR3
4
RF Device Data
Freescale Semiconductor
C10
R1
R3
R2
C1
C2
C5
C3
CUT OUT AREA
C13
C15
C11 C12
C19
C6
C14
C20
C8
C7
C17
C16
C18
C9
MRF7S21210H
Rev. 0
C4 not used in MRF7S21210HR3 part.
Figure 2. Test Circuit Component Layout — MRF7S21210HR3
MRF7S21210HR3 MRF7S21210HSR3
RF Device Data
Freescale Semiconductor
5
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