controllers allow a board to be safely inserted and removed
from a live backplane. Using an external N-channel pass
transistor, the board supply voltage can be ramped at an
adjustable rate. The devices feature independently adjust-
able inrush current and overcurrent limits to minimize
stresses on the pass transistor during start-up, input
step and output short conditions. The LTC4261 defaults
to latch-off while the LTC4261-2 defaults to auto-retry on
overcurrent faults.
An I
2
C interface and onboard 10-bit ADC allow monitoring
of board current, voltage and fault status. A single-wire
broadcast mode is available to simplify the interface by
eliminating two optoisolators.
The controllers have additional features to interrupt the
host when a fault has occurred, notify when output power
is good, detect insertion of a board and turn off the pass
transistor if an external supply monitor fails to indicate
power good within a timeout period.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation. Patents pending.
All other trademarks are the property of their respective owners.
Allows Safe Insertion into Live –48V Backplanes
10-Bit ADC Monitors Current and Voltages
I
2
C/SMBus Interface or Single-Wire Broadcast Mode
Floating Topology Allows Very High Voltage
Operation
Independently Adjustable Inrush and Overcurrent
Limits
Controlled Soft-Start Inrush
Adjustable UV/OV Thresholds and Hysteresis
Sequenced Power Good Outputs with Delays
Adjustable Power Good Input Timeout
Programmable Latchoff or Auto-Retry After Faults
Alerts Host After Faults
Available in 28-Lead Narrow SSOP and 24-Lead
(4mm
×
5mm) QFN Packages
APPLICATIONS
■
■
■
■
AdvancedTCA Systems
Telecom Infrastructure
–48V Distributed Power Systems
Power Monitors
TYPICAL APPLICATION
–48V/200W Hot Swap Controller with I
2
C and ADC
–48V RTN
453k
1%
4× 1k IN SERIES
1/4W EACH
–48V INPUT
50V/DIV
Start-Up Behavior
UV = 38.5V
UV RELEASE
AT 43V
OV = 72.3V
OV RELEASE
AT 71V
16.9k
1%
UVL
UVH
ADIN2
OV
INTV
CC
ON
SS
11.8k
1%
1µF
PGI
ALERT
SDAO
SDAI
LTC4261CGN
SCL
ADIN
PGIO
TMR EN V
EE
SENSE GATE DRAIN RAMP PG
47nF
10Ω
1M
1k
10nF
100V
5%
Q1
IRF1310NS
V
IN
V
IN+
LOAD
ON
V
IN–
+
330µF
100V
V
OUT
50V/DIV
SENSE
0.5A/DIV
PG
50V/DIV
10ms/DIV
42612 TA01b
220nF
0.1µF
47nF
0.008Ω
1%
–48V INPUT
V
OUT
42612 TA01
42612fb
1
LTC4261/LTC4261-2
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
V
IN
(Note 3) ......................................... –0.3V to 10.65V
Drain (Note 4) .......................................... –0.3V to 3.5V
PGI, ON, ALERT, SDAO, SDAI, SCL, ADIN, ADIN2,
OV, SENSE, ADR1, ADR0, FLTIN, TMR,
SS, RAMP Voltages.................... –0.3V to INTV
CC
+ 0.3V
UVL, UVH, EN ............................................ –0.3V to 10V
GATE Voltage .................................. –0.3V to V
IN
+ 0.3V
PG, PGIO Voltages .................................... –0.3V to 80V
Supply Voltage (INTV
CC
) .......................... –0.3V to 5.5V
Operating Temperature Range
LTC4261C ................................................ 0°C to 70°C
LTC4261I ............................................. –40°C to 85°C
Storage Temperature Range
SSOP ................................................. –65°C to 150°C
QFN.................................................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
SSOP Only ........................................................ 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
PGI
ON
ALERT
SDAO
SDAI
SCL
INTV
CC
UVL
UVH
1
2
3
4
5
6
7
8
9
28 PGIO
27 PG
26 EN
25 ADR1
24 ADR0
23 ADIN
22 FLTIN
21 V
IN
20 TMR
19 SS
18 RAMP
17 NC
16 DRAIN
15 GATE
SDAO 1
SDAI 2
SCL 3
INTV
CC
4
UVL 5
UVH 6
OV 7
8
V
EE
9 10 11 12
SENSE
GATE
DRAIN
RAMP
25
ALERT
TOP VIEW
PGIO
PGI
ON
PG
19 EN
18 ADR1
17 ADR0
16 ADIN
15 V
IN
14 TMR
13 SS
24 23 22 21 20
ADIN2 10
OV 11
NC 12
V
EE
13
SENSE 14
GN PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 85°C/W
UFD PACKAGE
24-LEAD (4mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 45°C/W
EXPOSED PAD (PIN 25) PCB V
EE
ELECTRICAL CONNECTION OPTIONAL
ORDER PART NUMBER
LTC4261CGN
LTC4261IGN
LTC4261CGN-2
LTC4261IGN-2
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
ORDER PART NUMBER
LTC4261CUFD
LTC4261IUFD
LTC4261CUFD-2
LTC4261IUFD-2
UFD PART MARKING*
4261
4261
42612
42612
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
42612fb
2
LTC4261/LTC4261-2
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at I
IN
= 5mA, T
A
= 25°C. (Note 2)
SYMBOL
General
V
Z
ΔV
Z
I
IN
V
IN(UVLO)
ΔV
IN(UVLO)
INTV
CC
Gate Drive
V
GATEH
I
GATE(UP)
I
GATE(OFF)
t
PHL(SENSE)
t
PHL(GATE)
t
PHLCB
I
RAMP
V
SS
I
SS(UP)
I
SS(DN)
Input Pins
V
UVH(TH)
V
UVL(TH)
ΔV
UV(HYST)
δV
UV
V
UVLR(TH)
ΔV
UVLR(HYST)
V
OV(TH)
ΔV
OV(HYST)
ΔV
SENSE
V
INPUT(TH)
ΔV
INPUT(HYST)
V
PGIO(TH)
ΔV
PGIO(HYST)
I
INPUT
UVH Threshold Voltage
UVL Threshold Voltage
Built-In UV Hysteresis
UVH, UVL Minimum Hysteresis
UVL Reset Threshold Voltage
UVL Reset Hysteresis
OV Pin Threshold Voltage
OV Pin Hysteresis
Current Limit Sense Voltage Threshold
ON, EN, PGI, FLTIN Threshold Voltage
ON, EN, PGI, FLTIN Hysteresis
PGIO Pin Input Threshold Voltage
PGIO Pin Input Hysteresis
ON, EN, UVH, UVL, OV, SENSE, PGI,
FLTIN Input Current
ON, EN, UVH, UVL, OV, SENSE, PGI, FLTIN = 3V
●
V
PGIO
Rising
●
ELECTRICAL CHARACTERISTICS
PARAMETER
Shunt Regulator Voltage at V
IN
Shunt Regulator Load Regulation
V
IN
Supply Current
V
IN
Undervoltage Lockout Threshold
V
IN
Undervoltage Lockout Hysteresis
Internal Regulator Voltage
GATE Pin Output High Voltage
GATE Pin Pull-Up Current
GATE Turn-Off Current
SENSE High to Current Limit
Propagation Delay
GATE Off Propagation Delay
Circuit Breaker Gate Off Delay
RAMP Pin Current
SS Pin Clamp Voltage
SS Pin Pull-Up Current
SS Pin Pull-Down Current
CONDITIONS
I
IN
= 5mA
I
IN
= 5mA to 25mA
V
IN
= V
Z
– 0.3V
V
IN
Rising
I
LOAD
= 1mA to 20mA, I
IN
= 25mA
V
IN
= 10.65V
V
GATE
= 4V
V
SENSE
= 300mV, V
GATE
= 4V
Gate Off, V
GATE
= 4V
V
SENSE
= 100mV, C
GATE
= 1pF
V
SENSE
= 300mV, C
GATE
= 1pF
Input High (OV, EN, PGI), Input Low (ON, UVL),
C
GATE
= 1pF
V
GATE
< 2V, C
GATE
= 1pF
V
SS
= 2.56V
V
SS
= 0V
V
SS
= 2.56V
V
UVH
Rising
V
UVL
Falling
LTC4261C
LTC4261I
LTC4261C
LTC4261I
●
●
●
●
●
●
MIN
10.65
TYP
11.2
370
2
MAX
11.8
600
5
9.5
1
5.25
10.5
–15.5
140
140
1.5
0.5
0.5
620
–22
2.69
–13
20
2.586
2.598
2.319
2.328
282
1.30
1.796
1.805
62
55
2
1.40
±2
UNITS
V
mV
mA
V
V
V
V
µA
mA
mA
µs
µs
µs
µs
µA
V
µA
mA
V
V
mV
mV
V
mV
V
mV
mV
V
mV
V
mV
µA
8.5
0.3
4.75
10
–7.5
60
60
9
0.7
5
10.25
–11.5
110
110
0.5
0.2
0.2
●
●
●
●
●
●
●
●
●
●
●
●
440
–18
2.43
–7
6
2.534
2.522
2.263
2.254
256
1.12
1.744
1.735
18
45
0.8
1.10
530
–20
2.56
–10
12
2.56
2.56
2.291
2.291
269
15
1.21
60
1.770
1.770
37.5
50
1.4
170
1.25
100
0
●
●
●
●
●
UVH and UVL Tied Together
V
UVL
Falling
V
OV
Rising
LTC4261C
LTC4261I
●
●
●
●
●
●
V
SENSE
– V
EE
ON, EN, PGI, FLTIN Falling or Rising
42612fb
3
LTC4261/LTC4261-2
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at I
IN
= 5mA, T
A
= 25°C. (Note 2)
SYMBOL
Timer
V
TMR(H)
V
TMR(L)
I
TMR(UP)
TMR Pin High Threshold
TMR Pin Low Threshold
TMR Pin Pull-Up Current
V
TMR
Rising
V
TMR
Falling
Turn-On and Auto-Retry (Except OC) Delays,
V
TMR
= 0.2V
Power Good, PGI Check and OC Auto-Retry
Delays, V
TMR
= 0.2V
I
TMR(DN)
TMR Pin Pull-Down Current
Delays Except PGI Check or OC Auto-Retry,
V
TMR
= 2.56V
PGI Check and OC Auto-Retry Delays,
V
TRM
= 2.56V
Output Pins
V
PWRGD
I
PWRGD
ADC
Resolution (No Missing Codes)
INL
V
OS
Integral Nonlinearity
Offset Error
Full-Scale Voltage
Total Unadjused Error
Conversion Rate
R
ADIN
I
ADIN
I
2
C Interface
V
ADR(H)
V
ADR(L)
I
ADR(IN)
V
ALERT(OL)
V
SDAO(OL)
I
SDAO,ALERT(IN)
V
SDAI,SCL(TH)
I
SDAI,SCL(IN)
ADR0, ADR1 Input High Threshold
ADR0, ADR1 Input Low Threshold
ADR0, ADR1 Input Current
ALERT Pin Output Low Voltage
SDAO Pin Output Low Voltage
SDAO, ALERT Input Current
SDAI, SCL Input Threshold
SDAI, SCL Input Current
SDAI, SCL = 5V
ADR0, ADR1 = 0V, 5V
ADR0, ADR1 = 0.8V, (INTV
CC
– 0.8V)
I
ALERT
= 4mA
I
SDAO
= 4mA
SDAO, ALERT = 5V
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
2.43
40
–7
–3.5
6
3
TYP
2.56
75
–10
–5
12
5
MAX
2.69
110
–13
–6.5
20
7
UNITS
V
mV
µA
µA
mA
µA
PG, PGIO Pins Output Low
PG, PGIO Pins Leakage Current
I
PG
, I
PGIO
= 3mA
I
PG
, I
PGIO
= 500µA
PG, PGIO = 80V
(Note 5)
SENSE
ADIN2/OV, ADIN
SENSE
ADIN2/OV, ADIN
SENSE
ADIN2/OV, ADIN
SENSE
ADIN2/OV, ADIN
●
●
●
0.8
0.15
0
10
±0.5
±0.25
1.6
0.4
±10
V
V
µA
Bits
●
●
●
●
●
●
●
●
●
●
±2.5
±1.25
±1.75
±1.25
LSB
LSB
LSB
LSB
mV
V
%
%
Hz
MΩ
µA
V
V
µA
µA
V
V
µA
V
µA
62.8
2.514
64
2.560
65.2
2.606
±1.8
±1.6
5.5
2
7.3
10
0
9
±2
INTV
CC
– 0.3
0.8
±80
ADIN, ADIN2 Pins Input Resistance
ADIN, ADIN2 Pins Input Current
ADIN, ADIN2 = 1.28V
ADIN, ADIN2 = 2.56V
●
●
INTV
CC
– 0.8
0.3
±10
INTV
CC
– 0.5
0.5
0.2
0.2
0
1.6
1.8
0
0.4
0.4
±5
2
±2
42612fb
4
LTC4261/LTC4261-2
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at I
IN
= 5mA, T
A
= 25°C. (Note 2)
SYMBOL
f
SCL(MAX)
t
LOW
t
HIGH
t
BUF(MIN)
t
HD,STA(MIN)
t
SU,STA(MIN)
t
SU,STO(MIN)
t
HD,DATI(MIN)
t
HD,DATO(MIN)
t
SU,DAT(MIN)
t
SP(MAX)
t
RST
C
X
PARAMETER
Maximum SCL Clock Frequency
Minimum SCL Low Period
Minimum SCL High Period
Minimum Bus Free Time Between
Stop/Start Condition
Minimum Hold Time After (Repeated)
Start Condition
Minimum Repeated Start Condition
Set-Up Time
Minimum Stop Condition Set-Up Time
Minimum Data Hold Time Input
Minimum Data Hold Time Output
Minimum Data Set-Up Time Input
Maximum Suppressed Spike Pulse
Width
Stuck-Bus Reset Time
SCL,SDA Input Capacitance
SCL or SDAI Held Low
SDAI Tied to SDAO
50
25
300
CONDITIONS
MIN
400
0.65
50
0.12
140
30
30
–100
600
30
110
66
5
10
1.3
600
1.3
600
600
600
0
900
100
250
TYP
MAX
UNITS
kHz
µs
ns
µs
ns
ns
ns
ns
ns
ns
ns
ms
pF
I
2
C Interface Timing (Note 5)
ELECTRICAL CHARACTERISTICS
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive, all voltages are referenced to
device GND (V
EE
) unless otherwise specified.
Note 3:
An internal shunt regulator limits the V
IN
pin to a minimum of
10.65V. Driving this pin to voltages beyond 10.65V may damage the part.
The pin can be safely tied to higher voltages through a resistor that limits
the current below 50mA.
Note 4:
An internal clamp limits the DRAIN pin to a minimum of 3.5V.
Driving this pin to voltages beyond the clamp may damage the part. The
pin can be safely tied to higher voltages through a resistor that limits the
卡巴斯基的安全研究人员称其发现了如何攻击Intel微处理器的远程攻击代码，据传，这一代码可以通过TCP/IP包和JavaScript代码到达用户系统。 目前受影响的系统包括Windows XP，Vista，Windows Server 2003，Windows Server 2008，Linux甚至是BSD和Mac。但所幸大多数错误可以由Intel和BIOS厂商联合进行修复。 卡...[详细]
Linux开发
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
