LTC2294
Dual 12-Bit, 80Msps
Low Power 3V ADC
FEATURES
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DESCRIPTIO
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Integrated Dual 12-Bit ADCs
Sample Rate: 80Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 422mW
70.6dB SNR at 70MHz Input
90dB SFDR at 70MHz Input
110dB Channel Isolation at 100MHz
Multiplexed or Separate Data Bus
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
64-Pin (9mm
×
9mm) QFN Package
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
The LTC
®
2294 is a 12-bit 80Msps, low power dual 3V
A/D converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2294 is perfect for
demanding imaging and communications applications
with AC performance that includes 70.6dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include
±0.4LSB
INL (typ),
±0.2LSB
DNL (typ)
and no missing codes over temperature. The transition
noise is a low 0.3LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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TYPICAL APPLICATIO
+
ANALOG
INPUT A
INPUT
S/H
OV
DD
12-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D11A
•
•
•
–
D0A
OGND
SNR (dBFS)
CLK A
CLOCK/DUTY CYCLE
CONTROL
MUX
CLOCK/DUTY CYCLE
CONTROL
CLK B
OV
DD
+
ANALOG
INPUT B
INPUT
S/H
–
12-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D11B
•
•
•
D0B
OGND
2294 TA01
U
SNR vs Input Frequency,
–1dB, 2V Range
75
74
73
72
71
70
69
68
67
66
65
0
100
50
150
INPUT FREQUENCY (MHz)
200
2294 TA02
U
U
2294fa
1
LTC2294
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
64 GND
63 V
DD
62 SENSEA
61 VCMA
60 MODE
59 SHDNA
58 OEA
57 OFA
56 DA11
55 DA10
54 DA9
53 DA8
52 DA7
51 DA6
50 OGND
49 OV
DD
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2294C ............................................... 0°C to 70°C
LTC2294I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
A
INA+
1
A
INA–
2
REFHA 3
REFHA 4
REFLA 5
REFLA 6
V
DD
7
CLKA 8
CLKB 9
V
DD
10
REFLB 11
REFLB 12
REFHB 13
REFHB 14
A
INB–
15
A
INB+
16
65
48 DA5
47 DA4
46 DA3
45 DA2
44 DA1
43 DA0
42 NC
41 NC
40 OFB
39 DB11
38 DB10
37 DB9
36 DB8
35 DB7
34 DB6
33 DB5
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
LTC2294IUP
LTC2294CUP
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
●
GND 17
V
DD
18
SENSEB 19
VCMB 20
MUX 21
SHDNB 22
OEB 23
NC 24
NC 25
DB0 26
DB1 27
DB2 28
DB3 29
DB4 30
OGND 31
OV
DD
32
QFN PART*
MARKING
LTC2294UP
MIN
●
●
●
●
TYP
±0.4
±0.2
±2
±0.5
±10
±30
±5
±0.3
±2
0.3
MAX
1.4
0.8
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
µV/°C
ppm/°C
ppm/°C
%FS
mV
LSB
RMS
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
External Reference
SENSE = 1V
12
–1.4
–0.8
–12
–2.5
2294fa
2
U
W
U
U
W W
W
U
LTC2294
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.7V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
Analog Input Leakage Current
SENSEA, SENSEB Input Leakage
MODE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
Figure 8 Test Circuit
0V < A
IN+
, A
IN–
< V
DD
0V < SENSEA, SENSEB < 1V
0V < MODE < V
DD
●
●
●
●
●
●
Analog Input Range (A
IN+
–A
IN–
)
Analog Input Common Mode (A
IN+
+A
IN–
)/2
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
40MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
5MHz Input
40MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher
5MHz Input
40MHz Input
70MHz Input
140MHz Input
S/(N+D)
Signal-to-Noise Plus Distortion Ratio
5MHz Input
40MHz Input
70MHz Input
140MHz Input
I
MD
Intermodulation Distortion
Crosstalk
f
IN
= 40MHz, 41MHz
f
IN
= 100MHz
●
●
●
●
U
W U
U
MIN
1
0.5
–1
–3
–3
TYP
±0.5
to
±1
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
µA
µA
µA
ns
ps
RMS
dB
MHz
0
0.2
80
575
MIN
69.1
TYP
70.6
70.6
70.6
70.3
90
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
74
90
90
85
90
79
90
90
90
70.6
68.7
70.5
70.5
70
90
–110
2294fa
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LTC2294
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
LOGIC INPUTS (CLK, OE, SHDN, MUX)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
●
4
U
U
U
U
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
2.7V < V
DD
< 3.4V
–1mA < I
OUT
< 1mA
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
µA
pF
V
IN
= 0V to V
DD
(Note 7)
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
●
●
3
50
50
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
0.4
pF
mA
mA
V
V
V
V
V
V
V
V
2294fa
LTC2294
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply Voltage
Output Supply Voltage
Supply Current
Power Dissipation
Shutdown Power (Each Channel)
Nap Mode Power (Each Channel)
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
CONDITIONS
(Note 9)
(Note 9)
Both ADCs at f
S(MAX)
Both ADCs at f
S(MAX)
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
●
●
●
●
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
s
t
L
t
H
t
AP
t
D
t
MD
PARAMETER
Sampling Frequency
CLK Low Time
CLK High Time
Sample-and-Hold Aperture Delay
CLK to DATA Delay
MUX to DATA Delay
Data Access Time After OE↓
BUS Relinquish Time
Pipeline Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 80MHz, input range = 2V
P-P
with differential
drive, unless otherwise noted.
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(Note 7)
●
●
●
●
TI I G CHARACTERISTICS
U W
MIN
2.7
0.5
TYP
3
3
141
422
2
15
MAX
3.4
3.6
165
495
UNITS
V
V
mA
mW
mW
mW
UW
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
●
●
●
●
●
MIN
1
5.9
5
5.9
5
1.4
1.4
TYP
6.25
6.25
6.25
6.25
0
2.7
2.7
4.3
3.3
5
MAX
80
500
500
500
500
5.4
5.4
10
8.5
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 80MHz, input range = 1V
P-P
with differential
drive. The supply current and power dissipation are the sum total for both
channels with both channels active.
Note 9:
Recommended operating conditions.
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