Philips Semiconductors
Product specification
Hex inverter
FEATURES
•
Wide supply voltage range form 1.65 to 3.6 V
•
3.6 V tolerant inputs/outputs
•
CMOS low power consumption
•
Direct interface with TTL levels (2.7 to 3.6 V)
•
Power-down mode
•
Latch-up performance exceeds 250 mA
•
Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V).
•
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C.
SYMBOL
t
PHL
/t
PLH
PARAMETER
propagation delay nA to nY
CONDITIONS
V
CC
= 1.8 V; C
L
= 30 pF; R
L
= 1 kΩ
V
CC
= 2.5 V; C
L
= 30 pF; R
L
= 500
Ω
V
CC
= 2.7 V; C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V; C
L
= 50 pF; R
L
= 500
Ω
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
.
input capacitance
power dissipation capacitance per buffer
V
CC
= 3.3 V; notes 1 and 2
DESCRIPTION
74ALVC04
The 74ALVC04 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit
tolerant for slower input rise and fall times.
The 74ALVC04 provides six inverting buffers.
TYPICAL
2.4
1.8
2.3
2.0
3.5
26
UNIT
ns
ns
ns
ns
pF
pF
2003 May 14
2
Philips Semiconductors
Product specification
Hex inverter
74ALVC04
handbook, halfpage
1A
1
VCC
14
13
12
6A
6Y
handbook, halfpage
1Y
2A
2Y
3A
3Y
2
3
4
5
6
7
Top view
GND
8
4Y
GND
(1)
11
10
9
5A
5Y
4A
A
Y
MNA341
MBL760
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin of input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic diagram (one inverter).
handbook, halfpage
1
handbook, halfpage
1
2
1
1A
1Y
2
3
1
4
3
2A
2Y
4
5
3A
3Y
6
5
1
6
9
4A
4Y
8
9
1
8
11
5A
5Y
10
11
1
10
13
6A
6Y
12
13
1
MNA343
MNA342
12
Fig.4 Logic symbol.
Fig.5 IEC logic symbol.
2003 May 14
4
Philips Semiconductors
Product specification
Hex inverter
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
O
T
amb
t
r
, t
f
PARAMETER
supply voltage
input voltage
output voltage
operating ambient temperature
input rise and fall times
V
CC
= 1.65 to 2.7 V
V
CC
= 2.7 to 3.6 V
V
CC
= 1.65 to 3.6 V
V
CC
= 0 V; Power-down mode
CONDITIONS
0
0
0
−40
0
0
MIN.
1.65
3.6
3.6
V
CC
3.6
+85
20
10
74ALVC04
MAX.
V
V
V
V
UNIT
°C
ns/V
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
, I
GND
T
stg
P
tot
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When V
CC
= 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
3. For SO14 packages: above 70
°C
derate linearly with 8 mW/K.
a) For TSSOP14 packages: above 60
°C
derate linearly with 5.5 mW/K.
b) For DHVQFN14 packages: above 60
°C
derate linearly with 4.5 mW/K.
PARAMETER
supply voltage
input diode current
input voltage
output diode current
output voltage
output source or sink current
V
CC
or GND current
storage temperature
power dissipation
T
amb
=
−40
to +85
°C;
note 3
V
O
> V
CC
or V
O
< 0
notes 1 and 2
Power-down mode; note 2
V
O
= 0 to V
CC
V
I
< 0
CONDITIONS
−
−0.5
−
−0.5
−0.5
−
−
−65
−
MIN.
−0.5
MAX.
+4.6
−50
+4.6
±50
V
CC
+ 0.5
+4.6
±50
±100
+150
500
V
mA
V
mA
V
V
mA
mA
°C
mW
UNIT
2003 May 14
5
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