HV4522
32-Channel Serial to Parallel Converter
with P-Channel Open Drain Outputs
Features
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Processed with HVCMOS
®
Technology
Output voltages to -220V
Source current minimum 60mA
Shift register speed 8.0MHz
Polarity and blanking inputs
CMOS compatible inputs
Forward and reverse shifting options
Can be used with the HV5522 to provide 220V
push-pull operation
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44-lead PLCC surface mount package
General Description
The HV4522 is a low-voltage serial to high-voltage parallel
converter with P-Channel open drain outputs. This device
has been designed for use a driver for AC-electroluminescent
displays. It can also be used in any application requiring multiple
output high-voltage current source capabilities, such as driving
inkjet and electrostatic print heads, plasma panels, or vacuum
fluorescent displays.
This device consists of a 32-bit shift register, 32 data latches,
and control logic to perform polarity and blanking functions.
Data is shifted through the shift register on the logic high-to-
low transition of the clock. The HV4522 shifts in the counter
clockwise direction (when viewed from the top of the package). A
data output buffer is provided for cascading devices. This output
reflects the current status of the last bit of the shift register. The
data in the shift register is latched when the latch enable pin is
brought to logic high, and then returned to ground. If the latch
enable pin is held high, the latch becomes transparent and the
shift register data is directly reflected in the outputs.
For applications requiring active pull down as well as pull up, the
HV4522 can be paired with the HV5522.
Functional Block Diagram
VSS
Polarity
Blanking
Latch Enable
Data Input
Clock
Latch
32-Bit
Shift
Register
Latch
HV
OUT
2
(Outputs 3 to 30
not shown)
Latch
HV
OUT
1
HV
OUT
31
Data Out
Latch
HV
OUT
32
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
HV4522
Ordering Information
Package Option
Device
.653x.653in body
.180in height (max)
.050in pitch
44-Lead PLCC
HV4522
HV4522PJ-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter
Supply voltage, V
DD
Output voltage , V
PP
Logic input levels
Ground current
(1)
Continuous total power dissipation
(2)
Operating temperature range
Storage temperature range
Lead temperature
(1.6mm from case for 10 seconds)
Pin Configuration
Value
+0.5V to -16V
+0.5V to -240V
+0.5V to V
DD
-0.3V
1.5A
1200mW
-40°C to +85°C
-65°C to +150°C
260°C
6
1 44
40
44-Lead PLCC (PJ)
(top view)
Product Marking
Top Marking
HV4522PJ
YYWW
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect device
reliability. All voltages are referenced to V
SS
.
Notes:
1. Duty cycle limited by the total power dissipated in the package.
2. For operation above 25°C ambiant derate linearly to maximum
operating temperature at 20mW/°C.
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
44-Lead PLCC (PJ)
Recommended Operating Conditions
Sym
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
Parameter
Logic supply voltage
Output voltage
High-level input voltage (Logic “1”)
Low-level input voltage (Logic “0”)
Clock frequency
Operating free-air temperature
Min
-10.8
+0.3
V
DD
+2.0V
0
-
-40
Max
-13.2
-220
V
DD
-2.0
8.0
+85
Units
V
V
V
V
MHz
°C
Note:
All voltages are referenced to V
SS
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
2
HV4522
DC Electrical Characteristics
(Over recommended operating conditions unless otherwise noted)
Sym
I
DD
I
DDQ
I
O(OFF)
I
IH
I
IL
V
OH
V
OL
V
OC
Parameter
V
DD
supply current
Quiescent V
DD
supply current
Off state output current
High-level logic input current
Low-level logic input current
High level output data out
Low level output
HV
OUT
clamp voltage
DD
Min
-
-
-
-
-
V
DD
+1.0V
-
-
-
= -12V, T
C
= 25°C)
Max
-15
-100
-100
-1.0
+1.0
-
-30
-1.0
+1.5
Units
mA
µA
µA
µA
µA
V
V
V
V
Conditions
f
CLK
= 8.0MHz, f
DATA
= 4.0MHz
V
IN
= V
SS
or V
DD
All SWS parallel
V
IH
= V
DD
V
IL
= V
SS
I
DOUT
= -100µA
I
HVOUT
= -60mA
I
DOUT
= -100µA
I
OL
= +60mA
HV
OUT
D
OUT
AC Electrical Characteristics
(V
Sym
f
CLK
t
WH
/t
WL
t
SU
t
H
t
ON
t
DHL
t
DLH
t
DLE
t
WLE
t
SLE
Parameter
Clock frequency
Clock width high or low
Data set-up time before clock rises
Data hold time after clock rises
Turn on time, HV
OUT
from enable
Min
-
62
50
20
-
-
-
50
50
50
Max
8.0
-
-
-
400
100
100
-
-
-
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
---
---
---
---
R
L
= 10K to V
OO
max
C
L
= 15pF
C
L
= 15pF
---
---
---
Delay time clock to data high to low
Delay time clock to data low to high
Delay time clock to LE high to low
LE pulse width
LE set-up time before clock rises
Input and Output Equivalent Circuits
V
SS
V
SS
V
SS
Input
Data Out
HV
OUT
V
DD
V
DD
Logic Inputs
Logic Data Output
High Voltage Output
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
3
HV4522
Switching Waveforms
Data Input
50%
t
SU
Clock
50%
t
WH
50%
t
WL
50%
Data Out
t
DHL
50%
t
DLH
50%
t
DLE
HV
OUT
w/ S/R HIGH
t
WLE
50%
t
SLE
V
SS
10%
t
ON
V
OO
Data Valid
t
H
50%
50%
50%
V
SS
V
SS
-12
V
SS
V
SS
-12
V
SS
V
SS
-12
V
SS
V
SS
-12
V
SS
V
SS
-12
Latch Enable
Function Table
Inputs
Function
Data
X
X
X
H or L
X
X
L
H
CLK
X
X
X
↓
H or L
H or L
↓
↓
LE
X
X
L
L
↑
↑
H
H
BL
L
L
H
H
H
H
H
H
POL
L
H
L
H
H
L
H
H
Shift Reg
1
*
*
*
H or L
*
*
L
H
2...32
*...*
*...*
*...*
*...*
*...*
*...*
*...*
*...*
Outputs
HV Outputs
1
H
L
*
*
*
*
L
H
2...32
H...H
L...L
*...*
*...*
*...*
*...*
*...*
*...*
Data Out
*
*
*
*
*
*
*
*
*
All on
All off
Invert mode
Load S/R
Load latches
Transparent
latch mode
Notes:
H = high level = -12V, L = low level = 0V, X = irrelevant, ↓ = high-to-low transition, ↑ = low-to-high transition.
* = dependent on previous stage’s state before the last CLK high-to-low transition or last LE high.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
4
HV4522
Pin Description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
37
39
40
41
42
43
44
Function
HV
OUT
17
HV
OUT
18
HV
OUT
19
HV
OUT
20
HV
OUT
21
HV
OUT
22
HV
OUT
23
HV
OUT
24
HV
OUT
25
HV
OUT
26
HV
OUT
27
HV
OUT
28
HV
OUT
28
HV
OUT
30
HV
OUT
31
HV
OUT
32
N/C
Data Out
N/C
N/C
N/C
POL
CLK
VSS
VDD
LE
Data In
BL
HV
OUT
1
HV
OUT
2
HV
OUT
3
HV
OUT
4
HV
OUT
5
HV
OUT
6
HV
OUT
7
HV
OUT
8
HV
OUT
9
HV
OUT
10
HV
OUT
11
HV
OUT
12
HV
OUT
13
HV
OUT
14
HV
OUT
15
HV
OUT
16
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
5
Description
High voltage outputs.
No connect.
Data output pin.
No connect.
Inverts the polarity of the HV
OUT
pins
Clock pin, shift registers shifts data on rising edge of input clock.
Reference voltage, usually ground.
Logic supply voltage.
Logic enable pin, data is shifted from shift register to latches on logic input low.
Data input pin.
Blanking pin, logic input low sets all HV
OUT
pins low.
High voltage outputs.
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