A3986
Dual Full-Bridge MOSFET Driver
with Microstepping Translator
Features and Benefits
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2-wire step and direction interface
Dual full-bridge gate drive for N-channel MOSFETs
Operation over 12 to 50 V supply voltage range
Synchronous rectification
Cross-conduction protection
Adjustable mixed decay
Integrated sinusoidal DAC current reference
Fixed off-time PWM current control
Description
The A3986 is a dual full-bridge gate driver with integrated
microstepping translator suitable for driving a wide range of
higher power industrial bipolar 2-phase stepper motors (typically
30 to 500 W). Motor power is provided by external N-channel
power MOSFETs at supply voltages from 12 to 50 V.
This device contains two sinusoidal DACs that generate the
reference voltage for two separate fixed-off-time PWM current
controllers. These provide current regulation for external power
MOSFET full-bridges.
Motor stepping is controlled by a two-wire step and direction
interface, providing complete microstepping control at full-,
half-, quarter-, and sixteenth-step resolutions. The fixed-off
time regulator has the ability to operate in slow-, mixed-, or
fast-decay modes, which results in reduced audible motor noise,
increased step accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of this
IC. Simply inputting one pulse on the STEP input drives the
motor one step (full, half, quarter, or sixteenth depending on
the microstep select input). There are no phase-sequence tables,
high frequency control lines, or complex interfaces to program.
This reduces the need for a complex microcontroller.
Package: 38 pin TSSOP (suffix LD)
Approximate size
Continued on the next page…
Typical Application Diagram
3986-DS, Rev. 1
A3986
Dual Full-Bridge MOSFET Driver
with Microstepping Translator
In addition to crossover current control, internal circuit protection
provides thermal shutdown with hysteresis and undervoltage lockout.
Special power-up sequencing is not required.
This component is supplied in an 38-pin TSSOP (package LD). The
package is lead (Pb) free, with 100% matte tin leadframe plating.
Description (continued)
The above-supply voltage required for the high-side N-channel
MOSFETs is provided by a bootstrap capacitor. Efficiency is
enhanced by using synchronous rectification and the power FETs
are protected from shoot-through by integrated crossover control
and programmable dead time.
Selection Guide
Part Number
A3986SLD-T
A3986SLDTR-T
Packing*
Tube, 50 pieces per tube
Tape and reel, 4000 pieces per reel
*Contact Allegro for additional packing options
Absolute Maximum Ratings
Characteristic
Supply Voltage
Logic Supply Voltage
Logic Inputs and Outputs
SENSEx pins
Sxx pins
LSSx pins
GHxx pins
GLxx pins
Cxx pins
Operating Ambient Temperature
Junction Temperature
Storage Temperature
T
A
T
J
(max)
T
stg
Range S
Symbol
V
BB
V
DD
Notes
Rating
–0.3 to 50
–0.3 to 7
–0.3 to 7
–1 to 1
–2 to 55
–2 to 5
Sxx to Sxx+15
–2 to 16
–0.3 to Sxx+15
–20 to 85
150
–55 to 150
Units
V
V
V
V
V
V
V
V
V
ºC
ºC
ºC
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
A3986
Dual Full-Bridge MOSFET Driver
with Microstepping Translator
Functional Block Diagram
+5 V
VDD
VBB
V
MOTOR
VREG
Bandgap
Regulator
CREG
V
REG
Phase 1A
Bridge1
CBOOT1A
REF
V
REF
High-Side
Drive
V
REG
DAC
STEP
PWM Latch
Blanking
Mixed Decay
Low-Side
Drive
GL1A
LSS1
SENSE1
Phase 1B
Low-Side
Drive
Phase 1
MS2
Phase 1
Control Logic
High-Side
Drive
GH1B
CBOOT1B
C1B
GL1B
S1B
RSENSE1
P
P
C1A
GH1A
S1A
RGH1A
RGH1B
RGL1A
RGL1B
DIR
MS1
Translator
PFD1
Phase 2A
V
MOTOR
Bridge2
C2A
CBOOT2A
PFD2
Phase 2
Control Logic
ENABLE
Phase 2
High-Side
Drive
V
REG
Low-Side
Drive
GH2A
S2A
RGH2A
RGH2B
GL2A
LSS2
SENSE2
RGL2A
RGL2B
RESET
PWM Latch
Blanking
Mixed Decay
Phase 2B
Low-Side
Drive
GL2B
S2B
GH2B
CBOOT2B
C2B
RSENSE2
P
SR
DAC
OSC
ROSC
Protection
UVLO
TSD
V
REF
High-Side
Drive
GND
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
A3986
Dual Full-Bridge MOSFET Driver
with Microstepping Translator
ELECTRICAL CHARACTERISTICS at T
A
= 25°C, V
DD
= 5 V, V
BB
= 12 to 50V, unless noted otherwise
Characteristics
Supply and Reference
Load Supply Voltage Range
Load Supply Current
Load Supply Idle Current
Logic Supply Voltage Range
Logic Supply Current
Logic Supply Idle Current
Regulator Output
Bootstrap Diode Forward Voltage
Gate Output Drive
Turn-On Rise Time
Turn-Off Fall Time
Turn-On Propagation Delay
Turn-Off Propagation Delay
Crossover Dead Time
Pull-Up On Resistance
Pull-Down On Resistance
Short-Circuit Current – Source
1
Short-Circuit Current – Sink
GHx Output Voltage
GLx Output Voltage
Logic Inputs
Input Low Voltage
Input High Voltage
Input Hysteresis
Input Current
1
RESET Pulse Width
2
Symbol
V
BB
I
BB
I
BBQ
V
DD
I
DD
I
DDQ
V
REG
V
fBOOT
t
r
t
f
t
p(on)
t
p(off)
t
DEAD
R
OSC
= 10 kΩ, C
LOAD
= 1000 pF
ENABLE = High, outputs disabled
RESET = 0
Test Conditions
Min.
12
–
–
–
3.0
–
–
11.25
0.6
80
40
–
–
0.6
30
14
–140
160
V
C
– 0.2
V
REG
–
0.2
–
0.7 V
DD
150
–1
0.2
Typ.
–
–
–
–
–
–
–
–
0.8
120
60
180
180
–
40
19
–110
200
–
–
–
–
300
–
–
Max.
50
10
6
100
5.5
10
300
13
1
160
80
–
–
1.2
55
24
–80
250
–
–
0.3 V
DD
–
–
1
1
Units
V
mA
mA
μA
V
mA
μA
V
V
ns
ns
ns
ns
μs
Ω
Ω
mA
mA
V
V
V
V
mV
μA
μs
RESET = 0
I
REGInt
= 30 mA
I
fBOOT
= 10 mA
C
LOAD
= 1000 pF, 20% to 80%
C
LOAD
= 1000 pF, 80% to 20%
ENABLE low to gate drive on
ENABLE high to gate drive off
R
OSC
= 10 kΩ,
I
GH
= –25 mA
I
GL
= 25 mA
R
DS(on)UP
R
DS(on)DN
I
SC(source)
I
SC(sink)
V
GHx
CBOOTx fully charged
V
GLx
V
IL
V
IH
V
IHys
I
IN
t
wR
Continued on the next page...
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
A3986
Dual Full-Bridge MOSFET Driver
with Microstepping Translator
ELECTRICAL CHARACTERISTICS, continued, at T
A
= 25°C, V
DD
= 5 V, V
BB
= 12 to 50V, unless noted otherwise
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max. Units
Current Control
Blank Time
t
BLANK
R
OSC
= 10 kΩ,
1.2
1.5
1.8
μs
Fixed Off-Time
t
OFF
R
OSC
= 10 kΩ, , SR= High
18.12
–
23.16
μs
0.8
–
2
V
Reference Input Voltage
V
REF
1.9
2.0
2.1
V
Internal Reference Voltage
V
REFInt
20 kΩ to V
DD
3
Current Trip Point Error
E
ITRIP
V
REF
= 2 V
–
–
±5
%
Reference Input Current
1
I
REF
–3
0
3
μA
Oscillator Frequency
f
OSC
R
OSC
= 10 kΩ
3.2
4
4.8
MHz
Protection
7.5
8
8.5
V
VREG Undervoltage Lockout
V
REGUV
Decreasing V
REG
VREG Undervoltage Lockout
V
REGUVHys
100
200
–
mV
Hysteresis
Decreasing V
DD
2.45
2.7
2.95
V
VDD Undervoltage Lockout
V
DDUV
VDD Undervoltage Lockout
V
DDUVHys
50
100
–
mV
Hysteresis
Overtemperature Shut Down
T
TSD
Temperature increasing
–
165
–
ºC
Overtemperature Shut Down
T
TSDHys
Recovery = T
TSD
– T
TSDHys
–
15
–
ºC
Hysteresis
Control Timing
STEP Low Duration
t
STEPL
1
–
–
μs
STEP High Duration
t
STEPH
1
–
–
μs
Input change to STEP pulse;
Setup Duration
t
SU
200
–
–
ns
MS1, MS2, DIR
Input change from STEP pulse;
200
–
–
ns
Hold Duration
t
H
MS1, MS2, DIR
Wake Time Duration
t
WAKE
1
–
–
ms
1
For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2
A RESET pulse of this duration will reset the translator to the Home position without entering Sleep mode.
3
Current Trip Point Error is the difference between actual current trip point and the target current trip point, referred to full
scale (100%) current: E
ITRIP
= 100 × (I
TRIPActual
– I
TRIPTarget
) / I
FullScale %
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
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