INTEGRATED CIRCUITS
DATA SHEET
SAA7345
CMOS digital decoding IC with
RAM for Compact Disc
Product specification
Supersedes data of 1996 Jan 09
File under Integrated Circuits, IC01
1998 Feb 16
Philips Semiconductors
Product specification
CMOS digital decoding IC with RAM for
Compact Disc
FEATURES
•
Integrated data slicer and clock regenerator
•
Digital Phase-Locked Loop (PLL)
•
Demodulator and Eight-to-Fourteen Modulation (EFM)
decoding
•
Subcoding microcontroller serial interface
•
Integrated programmable motor speed control
•
Error correction and concealment functions
•
Embedded Static Random Access Memory (SRAM) for
de-interleave and First-In First-Out (FIFO)
•
FIFO overflow concealment for rotational shock
resistance
•
Digital audio interface [European Broadcasting Union
(EBU)]
•
2 to 4 times oversampling integrated digital filter
•
Audio data peak level detection
•
Versatile audio data serial interface
•
Digital de-emphasis filter
•
Kill interface for Digital-to-Analog Converter (DAC)
deactivation during digital silence
•
Double speed mode
•
Compact Disc Read Only Memory (CD-ROM) modes
•
A single speed only version is available
(SAA7345GP/SS).
QUICK REFERENCE DATA
SYMBOL
V
DD
I
DD
f
xtal
T
amb
T
stg
supply voltage
supply current
crystal frequency
operating ambient temperature
storage temperature
PARAMETER
3.4
−
8
−40
−55
MIN.
5.0
22
16.9344 or
33.8688
−
−
TYP.
5.5
50
35
+85
+125
MAX.
GENERAL DESCRIPTION
SAA7345
The SAA7345 incorporates the CD signal processing
functions of decoding and digital filtering. The device is
equipped with on-board SRAM and includes additional
features to reduce the processing required in the analog
domain.
Supply of this Compact Disc IC does not convey an implied
license under any patent right to use this IC in any
Compact Disc application.
UNIT
V
mA
MHz
°C
°C
ORDERING INFORMATION
TYPE
NUMBER
SAA7345GP
PACKAGE
NAME
QFP44
DESCRIPTION
plastic quad flat package; 44 leads (lead length 2.35 mm); body
14
×
14
×
2.2 mm
VERSION
SOT205-1
1998 Feb 16
2
Philips Semiconductors
Product specification
CMOS digital decoding IC with RAM for
Compact Disc
BLOCK DIAGRAM
SAA7345
V
DDA
11
HFIN
HFREF
ISLICE
IREF
TEST1
TEST2
CRIN
CROUT
CL11
CLA
CL16
8
9
7
10
6
5
13
14
1
29
17
TIMING
VSSA
12
DIGITAL
PLL
VDD1
15
VSS1
16
VDD2
44
VSS2
43
22
MOTO1
MOTO2
PLL
FRONT-
END
SUBCODE
EFM
DEMODULATOR
MOTOR
CONTROL
23
ERROR
CORRECTOR
FLAGS
33
CFLG
SRAM
AUDIO
PROCESSOR
RAM
ADDRESSER
SAA7345
EBU
INTER-
FACE
2
DOBM
Q - CHANNEL
CRC CHECK
CL
DA
RAB
31
MICRO-
30
CONTROLLER
INTERFACE
32
Q - CHANNEL
REGISTER
PEAK
DETECT
21
SERIAL
DATA
INTER-
FACE
KILL
24
V5
27
KILL
MGA371 - 2
SCLK
WCLK
DATA
MISC
20
19
18
VERSATILE PINS
INTERFACE
3
V1
4
V2
26
V3
25
V4
PORE
28
Fig.1 Block diagram.
1998 Feb 16
3
Philips Semiconductors
Product specification
CMOS digital decoding IC with RAM for
Compact Disc
PINNING
SYMBOL
CL11
DOBM
V1
V2
TEST2
TEST1
ISLICE
HFIN
HFREF
IREF
V
DDA
V
SSA
CRIN
CROUT
V
DD1
V
SS1
CL16
MISC
DATA
WCLK
SCLK
MOTO1
MOTO2
V5
V4
V3
KILL
PORE
CLA
DA
CL
RAB
CFLG
n.c.
V
SS2
V
DD2
Note
1. All supply pins must be connected to the same external power supply.
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
43
44
DESCRIPTION
11.2896 or 5.6448 MHz clock output (3-state); (divide-by-3)
bi-phase mark output (externally buffered; 3-state)
versatile input pin
versatile input pin
test input; this pin should be tied LOW
test input; this pin should be tied LOW
current feedback output from data slicer
comparator signal input
comparator common-mode input
reference current pin (nominally
1
⁄
2
V
DD
)
analog supply voltage; note 1
analog ground; note 1
crystal/resonator input
crystal/resonator output
digital supply to input and output buffers; note 1
digital ground to input and output buffers; note 1
16.9344 MHz system clock output
general purpose DAC output (3-state)
serial data output (3-state)
word clock output (3-state)
serial bit clock output (3-state)
motor output 1; versatile (3-state)
motor output 2; versatile (3-state)
versatile output pin
versatile output pin
versatile output pin (open-drain)
kill output; programmable (open-drain)
power-on reset enable input (active LOW)
4.2336 MHz microcontroller clock output
interface data I/O line
interface clock input line
interface R/W and acknowledge input
correction flag output (open-drain)
digital ground to internal logic; note 1
digital supply voltage to internal logic; note 1
SAA7345
34 to 42 no internal connection
1998 Feb 16
4
Philips Semiconductors
Product specification
CMOS digital decoding IC with RAM for
Compact Disc
SAA7345
44 V DD2
VSS2
Pins 34 to 42 (inclusive)
have no internal connection
41
40
39
38
42
37
36
35
34
CL11
DOBM
V1
V2
TEST2
TEST1
ISLICE
HFIN
HFREF
IREF
VDDA
1
2
3
4
5
6
7
8
9
10
11
43
33 CFLG
32 RAB
31 CL
30 DA
29 CLA
SAA7345
28 PORE
27 KILL
26 V3
25 V4
24 V5
23 MOTO2
WCLK 20
SCLK 21
MOTO1 22
V SSA 12
CRIN 13
CROUT 14
V DD1 15
VSS1 16
CL16 17
MISC 18
DATA 19
MGA359 - 1
Fig.2 Pin configuration.
1998 Feb 16
5
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