Si4684-A10
Single-Chip, FM/DAB/DAB+ Radio Receiver
Description
The Si4684 single-chip digital receiver is one member of a
family of 100% CMOS digital radio broadcast receiver ICs
from Silicon Labs. The Si468x family offers a complete and
cost-effective digital radio solution integrating the RF tuner,
baseband and audio processing on a single die. The high
level of integration provides significant customer benefits
compared to traditional digital radio solutions, including a
reduction in system implementation complexity, validation
and testing, and improved reliability and manufacturability.
The Si4684 offers VHF Band III (168-240 MHz) reception
capability and is fully compliant with ETSI EN 300 401 and
ETSI TS 102 563. The Si4688 supports DAB and DAB+ via
an integrated source decoder that supports both MPEG
Audio Layer 2 (DAB) and HE-AAC V2 (DAB+). The Si4684
supports data services such as Dynamic Labels, Intellitext,
Electronic Program Guide (EPG), Slideshow and
Journaline® with the appropriate external decoders.
The Si4684 additionally supports worldwide FM radio
reception and incorporates a fully integrated decoder for
the European Radio Data System (RDS) and the North
American Radio Broadcast Data System (RDBS) including
all required symbol decoding, block synchronization, error
detection, and error correction functions.
For more information, visit the Si468x Digital Radio
Receivers web page.
Features
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Worldwide FM band support (76–108 MHz)
Advanced RDS/RBDS decoder
DAB, DAB+ Band III support (168–240 MHz)
Supports WorldDMB Receiver Profiles 1 and 2
Integrated OFDM channel demodulator
Integrated de-interleaving SRAM
I
2
S digital audio out with ASRC
Integrated 97 dB stereo audio DAC
Concurrent I
2
S/L-R stereo audio out
Full range of signal quality metrics
Fully-integrated VCO / PLL / synthesizer
SPI and I
2
C host control interfaces
WLCSP 62-ball, 3.2x3.77x0.59 mm
QFN 48-pin, 7x7x0.85 mm
Mobile phones and tablets
Clock and tabletop radios
Stereo boomboxes
Mini/micro systems
Docking stations
Personal navigation devices
Applications
Si4684-A10
RFREF
VHFI
ADC
LNA
ADC
AGC
RDS
I2S
DCLK
DFS
DOUT
SCLK
SSB
MISO
MOSI
DSP
DAC
ROUT
DAC
LOUT
VHFSW
VHF SW
LDOs
CLK
Gen
FLASH
Interface
Control
NVSCLK
NVSSB
XTALI
NVMOSI
NVMISO
VCORE
Digital Radio Receiver
Copyright © 2013 by Silicon Laboratories
XTALO
VMEM
RSTB
INTB
VIO
VA
05.07.2013
Si4684-A10
Single-Chip, FM/DAB/DAB+ Radio Receiver
Selected Electrical Specifications
Parameter
Ambient Temperature
Analog Supply Voltage
Interface Supply Voltage
Core Digital Supply Voltage
Memory Supply Voltage
Analog FM
Input Frequency
Seek Time
DAB/DAB+
Input Frequency
Enable Acquisition Time
F
rf
168
—
—
—
240
940
MHz
ms
F
rf
76
—
—
—
108
60
MHz
ms/ch
Symbol
T
A
V
A
V
IO
V
CORE
V
MEM
Test Conditions
Min
–40
1.71
1.62
1.62
1.62
Typ
25
1.8
1.8
1.8
1.8
Max
85
2.0
3.6
2.0
2.0
Units
°C
V
V
V
V
Si4684-A10-GM (QFN)
Si4684-A10-GD (WLCSP
)
Dimension
A
A1
b
D
D2
e
E
E2
L
aaa
bbb
ddd
eee
Notes:
1.
2.
3.
4.
Min
0.80
0.00
0.18
5.20
Nom
0.85
0.02
0.25
7.00 BSC
5.30
0.50 BSC
7.00 BSC
Max
0.90
0.05
0.30
5.40
5.20
0.30
5.30
0.40
0.15
0.10
0.05
0.08
5.40
0.50
All dimensions are shown in millimeters (mm) unless otherwise
noted.
Dimensioning and tolerancing per ASME Y14.5M-1994.
This drawing conforms to JEDEC Outline MO-220, Variation
VKKD-4.
Recommended card reflow profile is per the JEDEC/IPC J-
STD-020 specification for Small Body Components.
Dimension
Min
Nom
Max
A
0.55
0.59
0.63
A1
0.18
0.20
0.22
b
0.22
0.27
0.32
D
3.20 BSC.
E
3.77 BSC.
d
0.40 BSC.
e
0.40 BSC.
D1
2.40 BSC.
E1
3.20 BSC.
aaa
0.10
bbb
0.10
ccc
0.03
ddd
0.15
eee
0.05
Notes:
1.
All dimensions shown are in millimeters (mm) unless otherwise
noted.
2.
Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3.
Primary datum "C" and seating plane are defined by the spherical
crowns of the solder balls.
4.
Dimension "b" is measured at the maximum solder bump diameter,
parallel to primary datum "C".
5.
Recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
Digital Radio Receiver
Copyright © 2013 by Silicon Laboratories
05.07.2013
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
TI技术论坛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
