Si1004-C
Ultra-Low Power 64 kB, 10-bit ADC
MCU with Integrated 240–960 MHz Transceiver
Supply Voltage: 0.9 to 1.8 V
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Built-in dc-dc converter with 1.8 to 3.6 V output
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Typical sleep mode current < 0.1 µA; retains state and RAM
contents over full supply range; fast wakeup of < 2 µs
Transceiver Features
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Frequency range = 240–960 MHz
Sensitivity = –121 dBm
FSK, GFSK, and OOK modulation
Max output power = +13 dBm
RF power consumption
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Two built-in brown-out detectors cover sleep and active modes
10-Bit Analog to Digital Converter
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Up to 300 ksps
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Up to 15 external inputs
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External pin or internal VREF (no external capacitor required)
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Built-in temperature sensor (±3 °C); no calibration required
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External conversion start input option
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Autonomous burst mode with 16-bit automatic averaging
accumulator
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18.5 mA receive
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30 mA @ +13 dBm transmit
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18 mA @ +1 dBm transmit
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Data rate = 0.123 to 256 kbps
Auto-frequency calibration (AFC)
Antenna diversity and transmit/receive switch control
Programmable packet handler
TX and RX 64 byte FIFOs
Frequency hopping capability
On-chip crystal tuning
Dual Comparators
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Programmable hysteresis and response time
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Configurable as interrupt or reset source
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Low current (< 0.5 µA)
Memory
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64 kB bytes Flash; in-system programmable in 1024-byte
sectors; full read/write/erase functionality over the entire
supply range
Digital Peripherals
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19 port I/O
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Hardware enhanced UART, SPI and I
2
C serial ports available
concurrently
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Low power 32-bit smaRTClock
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Four general purpose 16-bit counter/timers; six channel
programmable counter array (PCA)
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4352 bytes internal data RAM (256 + 4K)
On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-intrusive in-
system debug (no emulator required)
Clock Sources
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Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-
ports UART operation; spread-spectrum mode for reduced EMI
High-Speed 8051 µC Core
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Pipe-lined instruction architecture; executes 70% of instructions
in 1 or 2 system clocks
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Low power 20 MHz internal oscillator
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External oscillator: crystal, RC, C, CMOS clock
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smaRTClock oscillator: 32.768 kHz crystal or self-oscillate
Ordering Part Number
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Si1004-C-GM, 42-pin QFN, 5 x 7 mm
2
Analog Peripherals
6-bit
IREF
Internal
VREF
External
VREF
A
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A
CP1, CP1A
+
-
-
25 MIPS peak throughput with 25 MHz clock
Development Kit: Si1000DK
Power On
Reset/PMU
Wake
Reset
CIP-51 8051
Controller Core
64k Byte ISP Flash
Program Memory
256 Byte SRAM
4096 Byte XRAM
CRC
Engine
Digital
Power
SYSCLK
RF XCVR
(240-960 MHz)
IREF0
PA
TX
AGC
LNA
Mixer
PGA
ADC
C2CK/RST
Debug /
Programming
Hardware
C2D
10-bit
300ksps
ADC
RXp
RXn
VDD/DC+
GND/DC-
Power Net
Analog
Power
VREG
Precision
24.5 MHz
Oscillator
DC/DC
Converter
Low Power
20 MHz
Oscillator
External
Oscillator
Circuit
smaRTClock
Oscillator
SFR
Bus
+
-
Comparators
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
Digital Peripherals
Transceiver Control Interface
VBAT
GND
UART
Timers 0,
1, 2, 3
PCA/
WDT
SMBus
SPI 0
Port I/O
Config
OSC
XTAL1
XTAL2
XTAL3
XTAL4
Priority
Crossbar
Decoder
19
XIN
XOUT
System Clock
Configuration
ANALOG &
DIGITAL I/O
Wireless MCU
Copyright © 2010 by Silicon Laboratories
1.15.10