Features
•
80C51 Core
– 12 or 6 Clocks per Instruction (X1 and X2 Modes)
– 256 Bytes Scratchpad RAM
– Dual Data Pointer
– Two 16-bit Timer/Counters: T0 and T1
T83C5121 with 16 Kbytes Mask ROM
T85C5121 with 16 Kbytes Code RAM
T89C5121 with 16 Kbytes Code RAM and 16 Kbytes EEPROM
On-chip Expanded RAM (XRAM): 256 Bytes
Versatile Host Serial Interface
– Full-duplex Enhanced UART (EUART) with Dedicated Baud Rate Generator (BRG):
Most Standard Speeds up to 230K bits/s at 7.36 MHz
– Output Enable Input
– Multiple Logic Level Shifters Options (1.8V to V
CC
)
– Automatic Level Shifter Option
Multi-protocol Smart Card Interface
– Certified with Dedicated Firmware According to ISO 7816, EMV2000, GIE-CB, GSM
11.12V and WHQL Standards
– Asynchronous Protocols T = 0 and T = 1 with Direct and Inverse Modes
– Baud Rate Generator Supporting All ISO7816 Speeds up to D = 32/F = 372
– Parity Error Detection and Indication
– Automatic Character Repetition on Parity Errors
– Programmable Timeout Detection
– Card Clock Stop High or Low for Card Power-down Mode
– Support Synchronous Card with C4 and C8 Programmable Outputs
– Card Detection and Automatic De-activation Sequence
– Step-up/down Converter with Programmable Voltage Output: 5V, 3V (± 8% at
60 mA) and 1.8V (±8% at 20 mA)
– Direct Connection to Smart Card Terminals:
Short Circuit Current Limitation
Logic Level Shifters
4 kV ESD Protection (MIL/STD 833 Class 3)
Alternate Card Support with CLK, I/O and RST According to GSM 11.12V Standard
2x I/O Ports: 6 I/O Port1 and 8 I/O Port3
2x LED Outputs with Programmable Current Sources: 2, 4, or 10 mA
Hardware Watchdog
Reset Output Includes
– Hardware Watchdog Reset
– Power-on Reset (POR)
– Power-fail Detector (PFD)
4-level Priority Interrupt System with 7 Sources
7.36 to 16 MHz On-chip Oscillator with Clock Prescaler
Absolute CPU Maximal Frequency: 16 MHz in X1 mode, 8MHz in X2 mode
Idle and Power-down Modes
Voltage Operation: 2.85V to 5.4V
Low Power Consumption
– 8 mA Operating Current (at 5.4V and 3.68 MHz)
– 150 mA Maximum Current with Smart Card Power-on (at 16 MHz X1 Mode)
– 30
μA
Maximum Power-down Current at 3.0V (without Smart Card)
– 100
μA
Maximum Power-down Current at 5.4V (without Smart Card)
Temperature Range
– Commercial: 0 to +70°C Operating Temperature
– Industrial: -40 to +85°C Operating Temperature
Packages
– SSOP24
– QFN32
– PLCC52
•
•
•
•
•
•
8-bit
Microcontroller
with Multi-
protocol Smart
Card Interface
T83C5121
T85C5121
T89C5121
AT83C5121
AT85C5121
AT89C5121
•
•
•
•
•
•
•
•
•
•
•
•
•
Rev. 4164G–SCR–07/06
Description
T8xC5121 is a high performance CMOS ROM/CRAM derivative of the 80C51 CMOS
single chip 8-bit microcontrollers.
T8xC5121 retains the features of the Atmel 80C51 with extended ROM capacity (16
Kbytes), 512 bytes of internal RAM, a 4-level interrupt system, two 16-bit timer/counters
(T0/T1), a full duplex enhanced UART (EUART) with baud rate generator (BRG) and an
on-chip oscillator.
In addition, the T8xC5121 have, a Multi protocol Smart Card Interface, a dual data
pointer, 2 programmable LED current sources (2-4-10 mA) and a hardware Watchdog.
T89C5121 Flash RAM version and T85C5121 Code RAM version can be loaded by In-
System Programming (ISP) software residing in the on-chip ROM from a low-cost exter-
nal serial EEPROM or from R232 interface.
T8xC5121 have 2 software-selectable modes of reduced activity for further reduction in
power consumption.
Block Diagram
Figure 1.
Block Diagram
E
V
CC
CVSS
D
V
CC
RxD
TxD
VSS
V
CC
(2) (2)
XTAL1
XTAL2
Xtal
Osc
(3)
EUART
BRG
DC/DC
XRAM
256
x8
LI
RAM
256 x8
ROM
16K x8
CRAM
16K x8
Voltage
Reg.
Converter
C
V
CC
(1)
CC4
(1)
CC8
(1)
CIO
(1)
CRST
(1)
CCLK
(1)
CPRES
(2)
CIO1
(2)
CRST1
(2)
CCLK1
:1-16
Clock
Prescaler
C51
CORE
IB-bus
SCIB
Level
Shifters
CPU
X2
EA
PSEN
ALE
(4)
Timer 0
Timer 1
INT
Ctrl
6 I/Os
Watchdog
POR
PFD
8 I/Os
Parallel I/O Ports
Direct
Drive
LED
Output
Alternate
Card
(2) (2)
P2
P0
(2) (2)
RST
(2) (2)
LED0
LED1
P3
T0
T1
INT0
Notes:
1.
2.
3.
4.
Alternate function of Port 1
Alternate function of Port 3
Only for the Code RAM version
Only for PLCC52
(1):
2
A/T8xC5121
4164G–SCR–07/06
INT1
P1
A/T8xC5121
Signals
Table 1.
Ports Description
Internal
Port
P1.0
Signal
Name
CIO
Power
Alternate
Supply
CV
CC
ESD
4 kV
Type
I/O
Description
Smart card interface function
Card I/O.
Input/Output function
P1.0 is a bi-directional I/O port .
Reset configuration
Input .
Smart card interface function
Card contact 8
Output function
P1.1 is a Push-pull port.
Reset configuration
Input
Smart card interface function
Card presence
Input/Output function
I/O
P1.2 is a bi-directional I/O port with internal pull-ups- ( External Pull-up
configuration can be selected).
Reset configuration
Input (high level due to internal pull-up)
Smart card interface function
Card contact 4
Output function
P1.3 is a Push-pull port.
Reset configuration
Input (high level due to internal pull-up)
Smart card interface function
Card clock
Input/Output function
P1.4 is a a Push-pull port.
Reset configuration
Output at low level
Smart card interface function
Card reset
Input/Output function
P1.5 is a a Push-pull port.
Reset configuration
Output at low level
All the T8xC5121 signals are detailed in Table 1.
The port structure is described in Section “Port Structure Description”.
I/O
I
P1.1
CC8
CV
CC
4 kV
O
O
I
P1.2
CPRES
V
CC
4 kV
I
I
P1.3
CC4
CV
CC
4 kV
O
O
I
P1.4
CCLK
CV
CC
4 kV
O
I/O
O
P1.5
CRST
CV
CC
4 kV
O
I/O
O
5
4164G–SCR–07/06
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