19-2878; Rev 0; 7/03
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
General Description
The MAX9394/MAX9395 consist of a 2:1 multiplexer
and a 1:2 demultiplexer with loopback. The multiplexer
section (channel B) accepts two low-voltage differential
signaling (LVDS) inputs and generates a single LVDS
output. The demultiplexer section (channel A) accepts
a single LVDS input and generates two parallel LVDS
outputs. The MAX9394/MAX9395 feature a loopback
mode that connects the input of channel A to the output
of channel B and connects the selected input of chan-
nel B to the outputs of channel A.
Three LVCMOS/LVTTL logic inputs control the internal
connections between inputs and outputs, one for the
multiplexer portion of channel B (BSEL), and the other
two for loopback control of channels A and B (LB_SELA
and LB_SELB). Independent enable inputs for each dif-
ferential output pair provide additional flexibility.
Fail-safe circuitry forces the outputs to a differential low
condition for undriven inputs or when the common-
mode voltage exceeds the specified range. The
MAX9394 provides high-level input fail-safe detection
for HSTL, LVDS, and other GND-referenced differential
inputs. The MAX9395 provides low-level fail-safe detec-
tion for CML, LVPECL, and other V
CC
-referenced differ-
ential inputs.
Ultra low 91ps
P-P
(max) pseudorandom bit sequence
(PRBS) jitter ensures reliable communications in high-
speed links that are highly sensitive to timing error,
especially those incorporating clock-and-data recovery,
or serializers and deserializers. The high-speed switch-
ing performance guarantees 1.5GHz operation and less
than 87ps (max) skew between channels.
LVDS inputs and outputs are compatible with the
TIA/EIA-644 LVDS standard. The LVDS outputs drive
100Ω loads. The MAX9394/MAX9395 are offered in 32-
pin TQFP and 28-pin thin QFN packages and operate
over the extended temperature range (-40°C to +85°C).
Features
o
Guaranteed 1.5GHz Operation with 250mV
Differential Output Swing
o
Simultaneous Loopback Control
o
2ps
(RMS)
(max) Random Jitter
o
AC Specifications Guaranteed for 150mV
Differential Input
o
Signal Inputs Accept Any Differential Signaling
Standard
o
LVDS Outputs for Clock or High-Speed Data
o
High-Level Input Fail-Safe Detection (MAX9394)
o
Low-Level Input Fail-Safe Detection (MAX9395)
o
+3.0V to +3.6V Supply Voltage Range
o
LVCMOS/LVTTL Logic Inputs
MAX9394/MAX9395
Ordering Information
PART
MAX9394EHJ
MAX9394ETI*
MAX9395EHJ
MAX9395ETI*
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
32 TQFP
28 Thin QFN
32 TQFP
28 Thin QFN
*Future
product—contact factory for availability.
Typical Operating Circuit
+3.0V TO
+3.6V
0.1µF
0.01µF
V
CC
Z
0
= 50Ω
100Ω
Z
0
= 50Ω
INA
INA
OUTA0
Z
0
= 50Ω
100Ω
MAX9394
MAX9395
OUTA0
Z
0
= 50Ω
Applications
High-Speed Telecom/Datacom Equipment
Central Office Backplane Clock Distribution
DSLAM
Protection Switching
Fault-Tolerant Systems
LVCMOS/LVTTL
LOGIC INPUTS
INB0
INB0
INB1
INB1
ENA0
ENA1
ENB
OUTA1
Z
0
= 50Ω
LVDS
RECEIVER
OUTA1
Z
0
= 50Ω
OUTB
Z
0
= 50Ω
OUTB
Z
0
= 50Ω
LB_SELA
LB_SELB
BSEL
GND
GND
GND
GND
Pin Configurations and Functional Diagram appear at end
of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
MAX9394/MAX9395
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ...........................................................-0.3V to +4.1V
IN_ _,
IN_ _,
OUT_ _,
OUT_ _,
EN_ _, _SEL, LB_SEL_
to GND........................................................-0.3V to (V
CC
+ 0.3V)
IN_ _ to
IN_ _..........................................................................±3V
Short-Circuit Duration (OUT_ _,
OUT_ _)
...................Continuous
Continuous Power Dissipation (T
A
= +70°C)
32-Pin TQFP (derate 13.1mW/°C above +70°C)........1047mW
28-Pin 5mm x 5mm Thin QFN
(derate 20.8mW/°C above +70°C) .............................1667mW
Junction-to-Ambient Thermal Resistance in Still Air
32-Pin TQFP............................................................+76.4°C/W
28-Pin 5mm x 5mm Thin QFN....................................+48°C/W
Junction-to-Case Thermal Resistance
28-Pin 5mm x 5mm Thin QFN......................................+2°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection (Human Body Model)
(IN_ _,
IN_ _,
OUT_ _,
OUT_ _,
EN_ _, SEL_, LB_SEL_) ..±2kV
Soldering Temperature (10s) ...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%, EN_ _ = V
CC
, V
CM
= +0.05V to (V
CC
- 0.6V) (MAX9394), V
CM
= +0.06V to (V
CC
- 0.05V)
(MAX9395), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.2V, T
A
= +25°C.)
(Notes 1, 2, and 3)
PARAMETER
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
DIFFERENTIAL INPUTS (IN_ _,
IN_ _)
Differential Input Voltage
V
ID
V
CM
MAX9395
Input Current
LVDS OUTPUTS (OUT_ _,
OUT_ _)
Differential Output Voltage
Change in Magnitude of V
OD
Between Complementary Output
States
Offset Common-Mode Voltage
Change in Magnitude of V
OS
Between Complementary Output
States
V
OD
∆V
OD
V
OS
∆V
OS
R
L
= 100Ω, Figure 2
Figure 2
Figure 2
Figure 2
1.125
250
350
1.0
1.25
1.0
450
50
1.375
50
mV
mV
V
mV
I
IN_ _
,
I
IN_ _
MAX9394
MAX9395
|V
ID
| < 3.0V
|V
ID
| < 3.0V
0.6
-75
-10
V
ILD
> 0V and V
IHD
< V
CC
, Figure 1
MAX9394
Input Common-Mode Range
0.1
0.05
3.0
V
CC
-
0.6
V
CC
-
0.05
10
100
V
SYMBOL
V
IH
V
IL
I
IH
I
IL
V
IN
= +2.0V to V
CC
V
IN
= 0V to +0.8V
CONDITIONS
MIN
2.0
0
0
0
TYP
MAX
V
CC
0.8
20
10
UNITS
V
V
µA
µA
LVCMOS/LVTTL INPUTS (EN_ _, BSEL, LB_SEL_)
V
µA
2
_______________________________________________________________________________________
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%, EN_ _ = V
CC
, V
CM
= +0.05V to (V
CC
- 0.6V) (MAX9394), V
CM
= +0.06V to (V
CC
- 0.05V)
(MAX9395), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.2V, T
A
= +25°C.)
(Notes 1, 2, and 3)
PARAMETER
Output Short-Circuit Current
(Output(s) Shorted to GND)
Output Short-Circuit Current
(Outputs Shorted Together)
SUPPLY CURRENT
R
L
= 100Ω, EN_ _ = V
CC
Supply Current
I
CC
R
L
= 100Ω, EN_ _ = V
CC
, switching at
670MHz (1.34Gbps)
53
53
65
65
mA
SYMBOL
V
ID
=
±100mV
(Note 4)
CONDITIONS
V
OUT_ _
or V
OUT_ _
= 0V
V
OUT_ _
=
V
OUT_ _
= 0V
MIN
TYP
30
17
5
MAX
40
mA
24
12
mA
UNITS
MAX9394/MAX9395
|I
OS
|
|I
OSB
|
V
ID
=
±100mV,
V
OUT_ _
= V
OUT_ _
(Note 4)
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, f
IN
< 1.34GHz, t
R_IN
= t
F_IN
= 125ps, R
L
= 100Ω ±1%, |V
ID
|
≥
150mV, V
CM
= +0.075V to (V
CC
- 0.6V)
(MAX9394 only), V
CM
= +0.6V to (V
CC
- 0.075V) (MAX9395 only), EN_ _ = V
CC
, T
A
= -40°C to +85°C, unless otherwise noted. Typical
values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.2V, f
IN
= 1.34GHz, T
A
= +25°C.) (Note 5)
PARAMETER
SEL to Switched Output
Disable Time to Differential
Output Low
Enable Time to Differential Output
High
Switching Frequency
Low-to-High Propagation Delay
High-to-Low Propagation Delay
Pulse Skew |t
PLH
– t
PHL
|
Output Channel-to-Channel Skew
Output Low-to-High Transition
Time (20% to 80%)
Output High-to-Low Transition
Time (80% to 20%)
Added Random Jitter
Added Deterministic Jitter
SYMBOL
t
SWITCH
t
PHD
t
PDH
f
MAX
t
PLH
t
PHL
t
SKEW
t
CCS
t
R
t
F
t
RJ
t
DJ
Figure 3
Figure 4
Figure 4
V
OD
> 250mV
Figures 1, 5
Figures 1, 5
Figures 1, 5 (Note 6)
Figure 6 (Note 7)
f
IN_ _
= 100MHz, Figures 1, 5
f
IN_ _
= 100MHz, Figures 1, 5
f
IN_ _
= 1.34GHz, clock pattern (Note 8)
1.34Gbps, 2 - 1 PRBS (Note 8)
23
CONDITIONS
MIN
TYP
MAX
1.1
1.7
1.7
UNITS
ns
ns
ns
GHz
1.5
340
340
2.2
567
562
12.4
16
720
720
86
87
187
187
2
60
91
ps
ps
ps
ps
ps
ps
ps
(RMS)
ps
P-P
112
112
154
152
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Measurements obtained with the device in thermal equilibrium. All voltages referenced to GND except V
ID
, V
OD
, and
∆V
OD
.
Current into the device defined as positive. Current out of the device defined as negative.
DC parameters production tested at T
A
= +25°C and guaranteed by design and characterization for T
A
= -40°C to +85°C.
Current through either output.
Guaranteed by design and characterization. Limits set at ±6 sigma.
t
SKEW
is the magnitude difference of differential propagation delays for the same output over the same condtions. t
SKEW
=
|t
PHL
- t
PLH
|.
Note 7:
Measured between outputs of the same device at the signal crossing points for a same-edge transition under the same con-
ditions. Does not apply to loopback mode.
Note 8:
Device jitter added to the differential input signal.
_______________________________________________________________________________________
3
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
MAX9394/MAX9395
Typical Operating Characteristics
(V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.2V, T
A
= +25°C, f
IN
= 1.34GHz, Figure 5.)
SUPPLY CURRENT vs. TEMPERATURE
MAX9394/95 toc01
OUTPUT AMPLITUDE vs. FREQUENCY
MAX9394/95 toc02
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
f
IN
= 100MHz
MAX9394/95 toc03
70
65
SUPPLY CURRENT (mA)
60
55
50
45
40
35
30
-40
-15
10
35
60
V
CC
= +3.3V
V
CC
= +3.0V
V
CC
= +3.6V
400
350
OUTPUT AMPLITUDE (mV)
300
250
200
150
100
50
0
180
170
RISE/FALL TIME (ps)
160
150
140
130
120
t
R
t
F
85
0
0.4
0.8
1.2
1.6
2.0
2.4
-40
-15
10
35
60
85
TEMPERATURE (°C)
FREQUENCY (GHz)
TEMPERATURE (°C)
PROPAGATION DELAY
vs. TEMPERATURE
MAX9394/95 toc04
MAX9394 DIFFERENTIAL INPUT CURRENT
vs. TEMPERATURE
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
MAX9394/95 toc05
MAX9395 DIFFERENTIAL INPUT CURRENT
vs. TEMPERATURE
V
IN_ _
= V
CC
70
INPUT CURRENT (µA)
60
50
40
30
20
10
0
V
IN_ _
= (V
CC
- 3.0V)
-40
-15
10
35
60
85
V
IN_ _
= (V
CC
- 0.1V)
MAX9394/95 toc06
600
590
PROPAGATION DELAY (ps)
580
570
560
550
540
530
520
510
500
-40
-15
10
35
60
V
IN_ _
= 0V
V
IN_ _
= 3.0V
80
INPUT CURRENT (µA)
V
IN_ _
= 0.1V
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
MAX9394
DIFFERENTIAL INPUT CURRENT vs. V
IHD
MAX9394/95 toc07
MAX9395
DIFFERENTIAL INPUT CURRENT vs. V
ILD
70
60
INPUT CURRENT (µA)
50
40
30
20
10
0
-10
V
CC
= +3V
V
CC
= +3.6V
IN_ _ OR
IN_ _ = V
CC
MAX9394/95 toc08
5
0
-5
INPUT CURRENT (µA)
-10
-15
-20
-25
-30
-35
-40
0
0.6
1.2
1.8
V
IHD
(V)
2.4
3.0
V
CC
= +3.6V
V
CC
= +3V
IN_ _ OR
IN_ _ = GND
80
3.6
0
0.6
1.2
1.8
V
ILD
(V)
2.4
3.0
3.6
4
_______________________________________________________________________________________
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
Pin Description
PIN
TQFP
1, 2, 3, 30,
31, 32
4, 9, 20, 25
5
6
7
QFN
1, 2, 28
3, 8, 18, 23
4
5
6
NAME
N.C.
GND
ENB
OUTB
OUTB
FUNCTION
No Connection. Not internally connected.
Ground
Channel B Output Enable. Drive ENB high to enable the LVDS outputs for channel B.
An internal 435kΩ resistor to GND pulls ENB low when unconnected.
Channel B LVDS Noninverting Output. Connect a 100Ω termination resistor between
OUTB and
OUTB
at the receiver inputs to ensure proper operation.
Channel B LVDS Inverting Output. Connect a 100Ω termination resistor between
OUTB and
OUTB
at the receiver inputs to ensure proper operation.
Power-Supply Input. Bypass each V
CC
to GND with a 0.1µF and 0.01µF ceramic
capacitor. Install both bypass capacitors as close to the device as possible, with the
0.01µF capacitor closest to the device.
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Inverting Input. An internal
128kΩ pullup resistor to V
CC
pulls the input high when unconnected (MAX9394). An
internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9395).
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Noninverting Input. An internal
128kΩ pullup resistor to V
CC
pulls the input high when unconnected (MAX9394). An
internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9395).
Loopback Select for Channel B Output. Connect LB_SELB to GND or leave
unconnected to reproduce the INB_ (INB_) differential inputs at OUTB (OUTB).
Connect LB_SELB to V
CC
to loop back the INA (INA) differential inputs to OUTB
(OUTB). An internal 435kΩ resistor to GND pulls LB_SELB low when unconnected.
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Inverting Input. An internal
128kΩ pullup resistor to V
CC
pulls the input high when unconnected (MAX9394). An
internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9395).
LVDS/HSTL (MAX9394) or LVPECL/CML (MAX9395) Noninverting Input. An internal
128kΩ pullup resistor to V
CC
pulls the input high when unconnected (MAX9394). An
internal 68kΩ resistor to GND pulls the input low when unconnected (MAX9395).
Channel B Multiplexer Control Input. Selects the differential input to reproduce at the
B channel differential output. Connect BSEL to GND or leave unconnected to select
the INB0 (INB0) set of inputs. Connect BSEL to V
CC
to select the INB1 (INB1) set of
inputs. An internal 435kΩ resistor to GND pulls BSEL low when unconnected.
Channel A1 Output Enable. Drive ENA1 high to enable the A1 LVDS outputs. An
internal 435kΩ resistor to GND pulls the ENA1 low when unconnected.
Channel A1 LVDS Inverting Output. Connect a 100Ω termination resistor between
OUTA1 and
OUTA1
at the receiver inputs to ensure proper operation.
Channel A1 LVDS Noninverting Output. Connect a 100Ω termination resistor between
OUTA1 and
OUTA1
at the receiver inputs to ensure proper operation.
MAX9394/MAX9395
8, 13, 24, 29
7, 22, 27
V
CC
10
9
INB0
11
10
INB0
12
11
LB_SELB
14
12
INB1
15
13
INB1
16
14
BSEL
17
18
19
15
16
17
ENA1
OUTA1
OUTA1
_______________________________________________________________________________________
5
嵌入式系统
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