MB95710M Series
MB95770M Series
New 8FX 8-bit Microcontrollers
The MB95710M/770M Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of this series contain a variety of peripheral resources.
Features
■
❐
F
2
MC-8FX CPU core
❐
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
Clock
❐
Selectable main clock source
• Main oscillation clock (up to 16.25 MHz, maximum ma-
chine clock frequency: 8.125 MHz)
• External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
• Main CR clock (4 MHz
2%)
• Main CR PLL clock
- The main CR PLL clock frequency becomes 8 MHz
2%
when the PLL multiplication rate is 2.
- The main CR PLL clock frequency becomes 10 MHz
2%
when the PLL multiplication rate is 2.5.
- The main CR PLL clock frequency becomes 12 MHz
2%
when the PLL multiplication rate is 3.
- The main CR PLL clock frequency becomes 16 MHz
2%
when the PLL multiplication rate is 4.
•Main PLL clock (up to 16.25 MHz, maximum machine
clock frequency: 16.25 MHz)
❐
Selectable subclock source
• Suboscillation clock (32.768 kHz)
• External clock (32.768 kHz)
• Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
Timer
❐
8/16-bit composite timer
2 channels
❐
8/16-bit PPG
2 channels
❐
16-bit reload timer
1 channel
❐
Event counter
1 channel
❐
Time-base timer
1 channel
❐
Watch counter
1 channel
❐
Watch prescaler
1 channel
UART/SIO
3 channels
❐
Full duplex double buffer
❐
Capable of clock asynchronous (UART) serial data transfer
and clock synchronous (SIO) serial data transfer
I
2
C bus interface
1 channel
❐
Built-in wake-up function
External interrupt
8 channels
Interrupt by edge detection (rising edge, falling edge, and
both edges can be selected)
❐
Can be used to wake up the device from different low power
consumption (standby) modes
■
8/12-bit A/D converter
8 channels
❐
8-bit or 12-bit resolution can be selected.
LCD controller (LCDC)
❐
On MB95F714J/F714M/F716J/F716M/F718J/F718M, LCD
output can be selected from 40 SEG
4 COM and 36 SEG
8 COM.
❐
On MB95F774J/F774M/F776J/F776M/F778J/F778M, LCD
output can be selected from 32 SEG
4 COM and 28 SEG
8 COM.
❐
Internal divider resistor whose resistance value can be se-
lected from 10 k or 100 k through software
❐
Interrupt in sync with the LCD module frame frequency
❐
Blinking function
❐
Inverted display function
Low power consumption (standby) modes
❐
There are four standby modes as follows:
• Stop mode
• Sleep mode
• Watch mode
• Time-base timer mode
I/O port
❐
MB95F714J/F716J/F718J (number of I/O ports: 75)
• General-purpose I/O ports (CMOS I/O): 71
• General-purpose I/O ports (N-ch open drain): 4
❐
MB95F714M/F716M/F718M (number of I/O ports: 74)
• General-purpose I/O ports (CMOS I/O): 71
• General-purpose I/O ports (N-ch open drain): 3
❐
MB95F774J/F776J/F778J (number of I/O ports: 59)
• General-purpose I/O ports (CMOS I/O): 55
• General-purpose I/O ports (N-ch open drain): 4
❐
MB95F774M/F776M/F778M (number of I/O ports: 58)
• General-purpose I/O ports (CMOS I/O): 55
• General-purpose I/O ports (N-ch open drain): 3
On-chip debug
❐
1-wire serial control
❐
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
❐
Built-in hardware watchdog timer
❐
Built-in software watchdog timer
Power-on reset
❐
A power-on reset is generated when the power is switched
on.
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Cypress Semiconductor Corporation
Document Number: 002-09307 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised November 14, 2016
MB95710M Series
MB95770M Series
■
Low-voltage detection (LVD) circuit (only available on
MB95F714J/F716J/F718J/F774J/F776J/F778J)
❐
Built-in low-voltage detection function
Comparator
1 channel
Clock supervisor counter
❐
Built-in clock supervisor counter
■
■
■
Dual operation Flash memory
❐
The program/erase operation and the read operation can be
executed in different banks (upper bank/lower bank) simul-
taneously.
Flash memory security function
❐
Protects the content of the Flash memory.
■
Document Number: 002-09307 Rev. *A
Page 2 of 172
MB95710M Series
MB95770M Series
Contents
Features............................................................................. 1
1. Product Line-up ............................................................ 4
1.1 MB95710M Series................................................. 4
1.2 MB95770M Series................................................. 7
2. Packages And Corresponding Products.................... 9
3. Differences Among Products And Notes On
Product Selection ........................................................... 10
4. Pin Assignment .......................................................... 11
5. Pin Functions (MB95710M Series) ............................ 13
6. Pin Functions (MB95770M Series) ............................ 19
7. I/O Circuit Type ........................................................... 24
8. Handling Precautions.................................................
8.1 Precautions for Product Design...........................
8.2 Precautions for Package Mounting .....................
8.3 Precautions for Use Environment........................
28
28
29
30
18.7 Port 9.................................................................
18.8 Port A ................................................................
18.9 Port B ................................................................
18.10 Port C ..............................................................
18.11 Port E ..............................................................
18.12 Port F...............................................................
18.13 Port G ..............................................................
72
74
77
79
82
85
87
19. I/O Ports (MB95770M Series)................................... 90
19.1 Port 0................................................................. 91
19.2 Port 1................................................................. 95
19.3 Port 2............................................................... 100
19.4 Port 6............................................................... 103
19.5 Port 9............................................................... 106
19.6 Port A .............................................................. 108
19.7 Port B .............................................................. 111
19.8 Port C .............................................................. 113
19.9 Port E .............................................................. 116
19.10 Port F............................................................. 119
19.11 Port G ............................................................ 121
20. Interrupt Source Table ........................................... 124
21. Pin States In Each Mode ........................................ 125
22. Electrical Characteristics.......................................
22.1 Absolute Maximum Ratings.............................
22.2 Recommended Operating Conditions .............
22.3 DC Characteristics ..........................................
22.4 AC Characteristics...........................................
22.5 A/D Converter.................................................
22.6 Flash Memory Program/Erase Characteristics
131
131
133
134
139
155
159
9. Notes On Device Handling......................................... 31
10. Pin Connection ......................................................... 31
11. Block Diagram (MB95710M Series)......................... 33
12. Block Diagram (MB95770M Series)......................... 34
13. CPU Core................................................................... 35
14. Memory Space .......................................................... 36
15. Areas For Specific Applications ............................. 38
16. I/O Map (MB95710M Series)..................................... 39
17. I/O Map (MB95770M Series)..................................... 45
18. I/O Ports (MB95710M Series)...................................
18.1 Port 0.................................................................
18.2 Port 1.................................................................
18.3 Port 2.................................................................
18.4 Port 4.................................................................
18.5 Port 5.................................................................
18.6 Port 6.................................................................
51
52
56
61
64
66
69
23. Sample Characteristics.......................................... 160
24. Mask Options .......................................................... 166
25. Ordering Information.............................................. 167
26. Package Dimension................................................ 168
Document History Page ............................................... 171
Sales, Solutions, and Legal Information .................... 172
Document Number: 002-09307 Rev. *A
Page 3 of 172
MB95710M Series
MB95770M Series
1. Product Line-up
1.1 MB95710M Series
Part number
MB95F714J
Parameter
MB95F716J
MB95F718J
MB95F714M
MB95F716M
MB95F718M
Type
Clock
supervisor
counter
Flash memory
capacity
RAM capacity
Power-on reset
Low-voltage
detection reset
Reset input
•
•
•
CPU functions
•
•
•
General-
purpose I/O
Yes
Selected through software
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Interrupt processing time
: 75
: 71
:4
Flash memory product
It supervises the main clock oscillation and the subclock oscillation.
20 Kbyte
512 bytes
36 Kbyte
1 Kbyte
60 Kbyte
2 Kbyte
Yes
No
With dedicated reset input
: 136
: 8 bits
: 1 to 3 bytes
: 1, 8 and 16 bits
: 61.5 ns (machine clock frequency = 16.25 MHz)
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O port
• CMOS I/O
• N-ch open drain
: 74
: 71
:3
20 Kbyte
512 bytes
36 Kbyte
1 Kbyte
60 Kbyte
2 Kbyte
• I/O port
• CMOS I/O
• N-ch open drain
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
• Reset generation cycle
Hardware/
software
Main oscillation clock at 10 MHz: 105 ms (min)
watchdog timer • The sub-CR clock can be used as the source clock of the software watchdog timer.
Wild register
8/12-bit
A/D converter
It can be used to replace 3 bytes of data.
8 channels
8-bit or 12-bit resolution can be selected.
2 channels
• The timer can be configured as an “8-bit timer × 2 channels” or a “16-bit timer × 1 channel”.
8/16-bit
• It has the following functions: interval timer function, PWC function, PWM function and input capture
composite timer function.
• Count clock: it can be selected from internal clocks (seven types) and external clocks.
• It can output square wave.
External
interrupt
On-chip debug
8 channels
• Interrupt by edge detection (The rising edge, falling edge, and both edges can be selected.)
• It can be used to wake up the device from different standby modes.
• 1-wire serial control
• It supports serial writing (asynchronous mode).
Document Number: 002-09307 Rev. *A
Page 4 of 172
MB95710M Series
MB95770M Series
Part number
MB95F714J
Parameter
MB95F716J
MB95F718J
MB95F714M
MB95F716M
MB95F718M
3 channels
• Data transfer with UART/SIO is enabled.
• It has a full duplex double buffer, variable data length (5/6/7/8 bits), an internal baud rate generator
and an error detection function.
• It uses the NRZ type transfer format.
• LSB-first data transfer and MSB-first data transfer are available to use.
• Both clock asynchronous (UART) serial data transfer and clock synchronous (SIO) serial data transfer
are enabled.
1 channel
I
2
C bus
interface
• Master/slave transmission and reception
• It has the following functions: bus error function, arbitration function, transmission direction detection
function, wake-up function, and functions of generating and detecting repeated START conditions.
2 channels
8/16-bit PPG
• Each channel can be used as an “8-bit timer
2 channels” or a “16-bit timer
1 channel”.
• The counter operating clock can be selected from eight clock sources.
1 channel
16-bit reload
timer
•
•
•
•
Two clock modes and two counter operating modes are available to use.
It can output square wave.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
Two counter operating modes: reload mode and one-shot mode
UART/SIO
Event counter
• The event counter function is implemented by configuring the 16-bit reload timer and 8/16-bit com-
posite timer ch. 1.
• When the event counter function is used, the 16-bit reload timer and 8/16-bit composite timer ch. 1
become unavailable.
• COM output: 4 or 8 (max) (selectable)
• SEG output: 36 or 40 (max) (selectable)
- If the number of COM outputs is 4, the maximum number of SEG outputs is 40, and the
maximum number of pixels that can be displayed 160 (4
40).
- If the number of COM outputs is 8, the maximum number of SEG outputs is 36, and the
maximum number of pixels that can be displayed 288 (8
36).
LCD controller • LCD drive power supply (bias) pins: 5 (max)
(LCDC)
• Duty LCD mode
• LCD standby mode
• Blinking function
• Internal divider resistor whose resistance value can be selected from 10 k or 100 k through software
• Interrupt in sync with the LCD module frame frequency
• Inverted display function
• Count clock: four selectable clock sources (125 ms, 250 ms, 500 ms or 1 s)
Watch counter • The counter value can be selected from 0 to 63. (The watch counter can count for one minute when
the clock source is one second and the counter value is set to 60.)
Watch prescaler Eight different time intervals can be selected.
Comparator
1 channel
Document Number: 002-09307 Rev. *A
Page 5 of 172
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