IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805/A
FEATURES:
•
•
•
•
•
•
•
•
•
•
•
DESCRIPTION:
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
V
CC
= 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages
The FCT3805 is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805 offers low capacitance inputs
with hysteresis.
The FCT3805 is designed for high speed clock distribution where signal
quality and skew are critical. The FCT3805 also allows single point-to-
point transmission line driving in applications such as address distribution,
where one signal must be distributed to multiple recievers with low skew
and high signal quality.
For more information on using the FCT3805 with two different input
frequencies on bank A and B, please see AN-236.
FUNCTIONAL BLOCK DIAGRAM
OE
A
5
IN
A
OA
1
- OA
5
PIN CONFIGURATION
V
CCA
OA
1
OA
2
OA
3
GND
A
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CCB
OB
1
OB
2
OB
3
GND
B
OB
4
OB
5
MON
OE
B
IN
B
IN
B
OE
B
5
OB
1
- OB
5
OA
4
OA
5
GND
Q
M ON
OE
A
IN
A
SOIC/ SSOP/ QSOP
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
1
c
2004
Integrated Device Technology, Inc.
SEPTEMBER 2004
DSC-3102/5
IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
V
TERM(4)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +4.6
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +60
Unit
V
V
V
°C
mA
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
IN
A
, IN
B
OAn, OBn
MON
Clock Inputs
Clock Outputs
Monitor Output
Description
3-State Output Enable Inputs (Active LOW)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. Input terminals.
4. Outputs and I/O terminals.
FUNCTION TABLE
(1)
Inputs
OE
A
,
OE
B
L
L
H
H
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
Outputs
IN
A
, IN
B
L
H
L
H
OAn, OBn
L
H
Z
Z
MON
L
H
L
H
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
4.5
5.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
2
IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Commercial: T
A
= 0°C to +70°C, Industrial: T
A
= -40°C to +85°C, V
CC
= 3.3V ± 0.3V
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
V
OH
V
OL
Parameter
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Input LOW Level (Input and I/O pins)
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedence Output Current
(3-State Output Pins)
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output HIGH Voltage
Output LOW Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OFF
I
OS
V
H
I
CCL
I
CCH
I
CCZ
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= Vcc - 0.6V at rated current.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
I
= 5.5V
V
I
= V
CC
V
I
= GND
V
I
= GND
V
O
= V
CC
V
O
= GND
Min.
2
2
–0.5
—
—
—
—
—
—
—
–36
50
V
CC
–0.2
2.4
(5)
—
—
—
—
–60
—
—
—
Typ.
—
—
—
—
—
—
—
—
—
–0.7
–60
90
—
3
—
0.2
0.3
—
–135
150
0.1
Max.
5.5
V
CC
+ 0.5
0.8
±1
±1
±1
±1
±1
±1
–1.2
–110
200
—
—
0.2
0.4
0.5
±1
–240
—
10
Unit
V
V
µA
µA
V
mA
mA
V
V
µA
mA
mV
µA
I
OH
= –0.1mA
I
OH
= –8mA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
Input Power Off Leakage
Short Circuit Current
(4)
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
= 4.5V
V
CC
= Max., V
O
= GND
(3)
V
CC
= Max.
V
IN
= GND or V
CC
3
IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
V
CC
= Max.
V
IN
= V
CC –
0.6V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
Per Output Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
O
= 25MHz
50% Duty Cycle
OE
A
=
OE
B
= V
CC
Mon. Output Toggling
V
CC
= Max.
Outputs Open
f
O
= 50MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
Eleven Outputs Toggling
NOTES:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at V
CC
= 3.3V, +25°C ambient.
Per TTL driven input (V
IN
= V
CC
-0.6V); all other inputs at V
CC
or GND.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6.
I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
I
N
= V
CC
-0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
Test Conditions
(1)
Min.
—
Typ.
(2)
10
0.035
Max.
30
0.06
Unit
µA
mA/MHz
V
IN
= V
CC
V
IN
= GND
—
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC –
0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC –
0.6V
V
IN
= GND
—
0.9
1.6
—
0.9
1.6
—
20
33
(5)
mA
—
20
33
(5)
4
IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
(3,4)
FCT3805
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
IN
A
to OAn, IN
B
to OBn
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
t
PZL
t
PZH
t
PLZ
t
PHZ
temperature, package type and speed grade
Output Enable Time
OE
A
to OAn,
OE
B
to OBn
Output Disable Time
OE
A
to OAn,
OE
B
to OBn
1.5
1.5
6.5
5.5
1.5
1.5
6
5
ns
ns
Conditions
(1)
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
1.5
—
—
—
—
—
Max
.
5.8
2
2
0.5
1
1.5
1.5
—
—
—
—
—
FCT3805A
Min
.
(2)
Max
.
5
2
2
0.5
1
1.2
Unit
ns
ns
ns
ns
ns
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
(3,4)
FCT3805
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(T)
Parameter
Propagation Delay
IN
A
to OAn, IN
B
to OBn
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Package skew: skew between outputs of different
packages at same power supply voltage,
t
PZL
t
PZH
t
PLZ
t
PHZ
temperature, package type and speed grade
Output Enable Time
OE
A
to OAn,
OE
B
to OBn
Output Disable Time
OE
A
to OAn,
OE
B
to OBn
1.5
1.5
6.5
5.5
1.5
1.5
6
5
ns
ns
Conditions
(1)
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
1.5
—
—
—
—
—
Max
.
5.8
2
2
0.6
1
1.5
1.5
—
—
—
—
—
FCT3805A
Min
.
(2)
Max
.
5.2
2
2
0.6
1
1.2
Unit
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK
(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay limits do not imply skew.
5
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