®
A Voltage Regulator Module (VRM) Using the
HIP6004 PWM Controller (HIP6004EVAL1)
Application Note
January 1997
AN9672
Author: Greg J. Miller
Introduction
Today’s high-performance microprocessors present many
challenges to their power source. High power consumption,
low bus voltages, and fast load changes are the principal
characteristics which have led to the need for a switch-mode
DC-DC converter local to the microprocessor.
Intel has specified a Voltage Regulator Module (VRM) for
the Pentium Pro Microprocessor [1]. This specification
details the requirements imposed upon the input power
source(s) by the Pentium-Pro and provides the computer
industry with a standard DC-DC converter solution. The
Intersil HIP6002 and HIP6003 pulse-width modulator (PWM)
controllers are targeted specifically for DC-DC converters
powering the Pentium-Pro and similar high-performance
microprocessors. The HIP6004 and HIP6005 PWM
controllers are enhanced versions of the HIP6002 and
HIP6003, with additional features specifically for next-
generation microprocessors.
VRM. Intersil also offers a Pentium-Pro VRM evaluation
board, the HIP6003EVAL1 [3].
HIP6004EVAL1 Features
• Exceeds Intel Pentium-Pro VRM Specifications
- Form-Factor (3.1” x 1.5” x 1.1”)
- Efficiency
- Regulation
• Operates in +5V or +12V Input Systems
• 5-Bit DAC with
±1%
Accuracy
• Overvoltage Protection via SCR and Fuse
• Overcurrent Protection
Input Voltage Sources
The HIP6004EVAL1 VRM is able to run off either +5VDC or
+12VDC main power source. In either case, +12V is
required for the bias supply of the HIP6004. The
HIP6004EVAL1 is configured to accept a 5V source, as
shown in Figure 2. The three approaches for powering the
VRM from +12V are:
1. Increase +5V source to +12V (for lab evaluation).
2. Tie 12Vin pins to 5Vin pins (again, lab evaluation).
3. Move F1 fuse as shown in Figure 2 and apply +12Vin (for
system implementation).
FUSE LOCATION 1: 5V SOURCE
F1
Intersil HIP6004
Figure 1 shows a simple block diagram of the HIP6004. The
HIP6004 is the controller for a synchronous-rectified Buck
converter. It contains a high-performance error amplifier, a
high-resolution 5-bit digital-to-analog converter (DAC), a
programmable free-running oscillator, and a pair of N-Channel
MOSFET drivers. A more complete description of the part can
be found in the HIP6004 Data Sheet [2]. The HIP6005 is very
similar to the HIP6004, but is targeted for standard buck
converters.
VCC
PGOOD 12
SS 3
RT
VID0
VID1
VID2
VID3
VID4
FB
20
4
5
6
7
8
10
18
OVP
19
2 OCSET
MONITOR
AND
PROTECTION
OSC
FUSE LOCATION 2: 12V SOURCE
15 BOOT
14 UGATE
13 PHASE
1 VSEN
F1
HIP6004
D/A
+
+
9
COMP
11
FIGURE 2. INPUT FUSE LOCATION vs INPUT SOURCE VOLTAGE
Output Voltage
The output voltage of the VRM is set by the 5-bit code
(VID0 - VID4) programmed by the processor in the system.
The DAC internal to the HIP6004 adjusts the internal
reference to set the nominal converter output voltage. The
output voltage programming is defined in the HIP6004 Data
Sheet.
The HIP6004EVAL1 is a solution for many different
microprocessors, both present and future. It is capable of
supplying greater than 14A of current and provide output
voltages from 1.3V to 3.5V.
-
17 LGATE
16 PGND
GND
-
FIGURE 1. BLOCK DIAGRAM OF HIP6004
HIP6004EVAL1 Reference Design
The HIP6004EVAL1 is an evaluation board which highlights
the operation of the HIP6004 in an expanded version of the
Pentium-Pro VRM. This evaluation board has greater
voltage adjustability (1.3V - 3.5V) and higher output current
capability (up to 14A) than the Intel-specified Pentium-Pro
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Pentium® is a registered trademark of Intel Corporation.
Application Note 9672
Efficiency
Figure 3 shows the measured evaluation board efficiency
versus load current for four different conditions. The data
was taken at room temperature with 100 linear feet per
minute (LFM) of airflow.
95
90
EFFICIENCY (%)
85
80
75
70
65
V
IN
= 5V, V
OUT
= 2.8V
V
IN
= 5V, V
OUT
= 2.0V
V
IN
= 12V, V
OUT
= 2.8V
V
IN
= 12V, V
OUT
= 2.0V
It does spread the main switch power losses across three
devices so it does have some thermal advantages. Similar
results can be expected for the comparison of two versus
three lower MOSFETs when Vin = 12V.
Thermal Performance
The thermal performance of the VRM is shown in Figure 5.
This data is with the following conditions applied:
1. V
IN
= 5V and V
OUT
= 2.8V.
2. 100 linear feet per minute (LFM) airflow parallel to the
plane of the pc board.
3. Ambient temperature = 22
o
C.
Thermal considerations were a major influence on the
design of the HIP6004EVAL1. The use of surface-mount
SO-8 MOSFETs means that the pc board traces are also the
heat sink. This causes a temperature rise (ΔT) to the pc
board, as evidenced in Figure 5. A four-layer board is used
to help keep the temperature gradients from exceeding
desirable limits. At a 14A load, the pc board
ΔT
is only about
20
o
C (measured near the MOSFETs) and the HIP6004
junction temperature is about 67
o
C.
2
4
6
8
10
12
14
LOAD CURRENT (A)
FIGURE 3. EFFICIENCY vs LOAD FOR HIP6004EVAL1
70
95
90
EFFICIENCY (%)
85
80
75
70
20
65
2
4
6
8
LOAD CURRENT (A)
10
12
14
2
4
8
6
LOAD CURRENT (A)
10
12
14
2 UPPER MOSFETs
3 UPPER MOSFETs
60
TEMPERATURE (
o
C)
HIP6004 JUNCTION
50
Q1 (UPPER) JUNCTION
40
Q5 (LOWER) JUNCTION
PC BOARD
30
FIGURE 4. COMPARISON OF HIP6004EVAL1 EFFICIENCY
WITH 2 UPPER MOSFETs AND 3 UPPER MOSFETs
FIGURE 5. THERMAL PERFORMANCE vs LOAD FOR
HIP6004EVAL1
The HIP6004EVAL1 uses four Intersil RF1K49157 (30V,
30mΩ) MOSFETs, two in parallel for both the main (upper)
and synchronous (lower) switches. The board was layed out
with provisions for three upper and four lower MOSFETs to
allow for greater flexibility in meeting a variety of
requirements. However, Figure 3 shows that the VRM
provides high efficiency for four different input and output
voltage combinations with only two upper and two lower
MOSFETs.
Figure 4 compares the efficiency of the HIP6004EVAL1,
both with and without an additional upper MOSFET (Q3)
populated at Vin = 5V and Vout = 2.8V. This figure shows
that a third upper MOSFET has minimal impact on efficiency.
2
Transient Response
Figures 6 and 7 show laboratory oscillograms of the
HIP6004EVAL1 in response to a load transient application.
The load transient applied was from 0A to 14A. As Figure 6
shows, the output voltage of the VRM (V
OUT
) remains well
within the
±5%
regulation window. There is sufficient
headroom to allow for worst-case component tolerances
(mainly in the equivalent series resistance (ESR) of the
output capacitors) and temperature effects. Figure 7 details
the positive edge of the load transient application. The
bottom trace is the output inductor current (I
L
).
Application Note 9672
3.00V
+5% REGULATION LIMIT
2.90V
V
OUT
14A
12A
10A
I
L
(2A/DIV)
2.80V
V
OUT
(20mV/DIV)
2.70V
-5% REGULATION LIMIT
2.60V
TIME (2ms/DIV)
TIME (2.5μs/DIV)
FIGURE 6. HIP6004EVAL1 OUTPUT TRANSIENT RESPONSE
FIGURE 8. OUTPUT VOLTAGE AND INDUCTOR CURRENT
RIPPLE WITH VIN = 5V, VOUT = 2.8V, AND A 12A
LOAD CURRENT
2.85V
2.80V
2.75V
15A
10A
5A
0A
I
L
V
OUT
Output Voltage Droop with Load
The HIP6004EVAL1 uses a droop function to maintain
output voltage regulation through load transients with fewer
(or less costly) output capacitors. With a high di/dt load
transient typical of the Pentium-Pro microprocessor, the
largest deviation of the output voltage is at the leading edge
of the transient. The droop function adds a deviation as a
function of load that counters the transient deviation.
Figure 9 illustrates the static-load droop characteristic. With
no-load, the output voltage is above the nominal output
level. The output decreases (or droops) as the load
increases.
TIME (50μs/DIV)
FIGURE 7. 0A TO 14A TRANSIENT RESPONSE
OUTPUT VOLTAGE (V)
Output Voltage Ripple
The HIP6004EVAL1 has ten parallel output capacitors,
mainly to supply the energy during the severe load
transients imposed by high-performance microprocessors.
This also helps provide a very low output voltage ripple, as
shown in Figure 8. With approximately 2A peak-to-peak (p-
p) inductor ripple current, the output voltage ripple is only
about 12mV
P-P
. Including noise spikes, the total output
deviation with this 12ADC load is about 20mV
P-P
(measurement is taken with a 20MHz oscilloscope
bandwidth).
If the application does not have a highly dynamic load, then
the number of output capacitors may be reduced. The output
voltage ripple increases with fewer output capacitors. For
instance, with just five output capacitors in parallel, the
output voltage ripple doubles to approximately 24mV
P-P
.
2.85
2.80
2.75
WITHOUT DROOP
WITH DROOP
0
5
10
15
OUTPUT CURRENT (A)
FIGURE 9. STATIC REGULATION OF THE HIP6004EVAL1
With a dynamic load, the droop function pre-biases the
output voltage to minimize the total deviation. Prior to the
application of load, the output voltage is above the nominal
level and the transient deviation results in an output lower
than the nominal level. Figure 6 illustrates the droop function
performance on the HIP6004EVAL1 converter. The transient
deviation is approximately 130mV. At light load, the output
voltage is about 50mV higher than the nominal output
voltage of 2.8V. At full load, the output voltage is about
40mV lower than nominal. The total deviation is within
3
Application Note 9672
±80mV
with the droop function compared to a deviation of
over
±130mV
without this function. Since the voltage
excursions at the transient edges are mainly a function of the
output capacitors, the converter uses fewer capacitors.
The HIP6004EVAL1 implements the droop function by using
the average voltage drop across the output inductor. The
average voltage drop equals the DC output current times the
DC winding resistance of the output inductor. Instead of
straight voltage feedback, an averaging filter (R8, R9, and
C25 in the schematic) is added around the output inductor.
This filter communicates both the output voltage and droop
information back to the PWM controller. A resistor (R2)
increases the light-load voltage above the DAC program level.
Conclusion
The HIP6004EVAL1 is a reference design suitable for a
DC-DC converter solution for the Pentium-Pro and other
high-performance microprocessors.
References
For Intersil documents available on the internet, see web site
http://www.intersil.com.
[1]
Pentium-Pro Processor Power Distribution Guidelines,
Intel Application Note AP-523, November, 1995.
[2]
HIP6004 Data Sheet,
Intersil Corporation, FN4275.
[3] AN9664 Application Note, Intersil Corporation,
“A
Pentium Pro Voltage Regulator Module (VRM) Using
the HIP6003 PWM Controller (HIP6003EVAL1)”
OC Protection
The HIP6004EVAL1 has lossless overcurrent (OC)
protection. This is accomplished via the HIP6004 current-
sense function. The HIP6004 senses converter load current
by monitoring the drop across the upper MOSFETs (Q1-2).
By selecting the appropriate value of the OCSET resistor
(R7), an overcurrent protection scheme is employed without
the cost and power loss associated with an external current-
sense resistor. The HIP6004 Data Sheet details the design
procedure for the OCSET resistor.
OV Protection
The HIP6004EVAL1 contains circuitry to protect against
overvoltage conditions. In the case of an overvoltage
(greater than 15% over the nominal Vout), the HIP6004 fires
an SCR (Q8) and the input fuse will open.
For applications where this feature is not necessary, the
following components may be eliminated: F1, Q8, and R6. A
wire must replace F1 when using HIP6004EVAL1 without
OV protection.
4
Application Note 9672
Appendix
Board Description
SILK SCREEN - TOP
GND
COMPONENT SIDE
SOLDER SIDE
INTERNAL ONE
SILK SCREEN - BOTTOM
5
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