VT-803
Temperature Compensated Crystal Oscillator
Voltage Controlled Temperature Compensated Crystal Oscillator
VT-803
Description
Vectron's VT-803 Temperature Compensated Crystal Oscillator (TCXO) is a quartz stabilized, clipped sine wave or CMOS output,
5th order analog temperature compensated oscillator, operating off a 2.8 to 5.0 volt supply in a hermetically sealed 3.2x5 mm
ceramic package.
Features
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•
•
•
•
•
Clipped Sine Wave or CMOS Output
10.000-52.000 MHz Output
±100 ppb Temperature Stability
Optional Enable/Disable Function
Optional VCXO
Fundamental Crystal Design
Gold over nickel contact pads
Hermetically Sealed Ceramic SMD package
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•
•
•
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•
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•
•
•
Applications
Stratum 3
SyncE
1588
Femto Cells
Base Stations
IP Networking
GPS
Point to Point Radio
Manpack Radio
Test and Measurement
• Product is compliant to RoHS directive
and fully compatible with lead free assembly
Block Diagram
V
DD
Crystal
Output
Analog
Temperature
Comp.
Vcontrol
Optional
Enable/Disable
Optional
Page1
GND
Specifications
Table 1. Electrical Performance, Clipped Sine Wave Option
Parameter
Output Frequency,
1
Ordering Option
Supply Voltage
2
,
Ordering Option
Supply Current, 10-20.000MHz
20.001-52.000MHz
Operating Temperature,
Ordering Option
Stability Over Operating Temperature
3
,
Ordering Option
Initial Accuracy, “No Adjust” Option
4
Power Supply Stability, ±5% change
Load Stability, ±10% change
Aging
Stability, temperature and 24 hours
5
Total Stability
5
Pull Range,
Ordering Option
Control Voltage to reach Pull Range
Control Voltage Impedance
Output Enable/Disable
6
,
Ordering Option
Output Enabled
Output Disabled (high impedance output)
Output Level
Output Load
Phase Noise, 26.000MHz
10Hz
100Hz
1kHz
10kHz
100kHz
Start Up Time
N
Symbol
f
O
V
DD
I
DD
T
OP
Min
10
Typ
+2.8, +3.0, +3.3, +5.0
Max
52
2.0
3.4
Units
MHz
V
mA
°C
ppm
ppm
ppm
ppm
ppm 1st yr
ppm
ppm
ppm
V
Kohm
-10/70, -20/70, -30/85, -40/85
±0.100, ±0.200, ±0.280, ±0.500, ±1.0, ±2.0
±1.5
±0.05
±0.05
±0.5
±0.37
±4.6
PR
0.5
100
V
IH
V
IL
V
O
p/p
±5, ±8, ±10, ±12
2.5
0.8*V
DD
0.2*V
DD
0.8
1.1
1.3
10K II 10pF
V
V
V
dBc/Hz
-91
-117
-136
-150
-158
t
SU
2
ms
1. The Output is DC coupled.
2.
The VT-803 power supply pin should be filtered, eg, a 10uF, 0.1uF and 0.01uf capacitor.
3. Not all stabilities are available over all temperature ranges. Measured at mid Vc for parts with frequency tuning.
4. After 2 IR reflows and 24 hours.
5. ±100, ±200 and ±280 ppb temp stability parts, all inclusive with 10 years aging.
6. Output is Enabled if E/D is left open.
Outline Drawing
Table 2. Pinout
Pin #
1
Frequency
Date Code
2
3
4
5
Dimensions in mm
6
7
8
Symbol
NC or V
C
NC
NC
GND
OUT
NC or E/D
NC
V
DD
Function
No Connection or TCXO Control Voltage
Make No Connection
Make No Connection
Ground
Output
No Connection or Enable/Disable
Make No Connection
Supply Voltage
Table 3. Enable Disable Function (optional)
Pin 6
High
Open
Low
Page2
Pin 5 Output
Clock Output
Clock Output
High Impedance
Specifications
Table 4. Electrical Performance, CMOS Option
Parameter
Output Frequency
1
,
Ordering Option
Supply Voltage
2
,
Ordering Option
Supply Current, 10-24.999MHz
25.000-39.000MHz
40.000- 49.999MHz
50.000- 52.000MHz
Operating Temperature,
Ordering Option
Stability Over Operating Temperature
3
,
Ordering Option
Initial Accuracy, “No Adjust” Option
4
Power Supply Stability, ±5% change
10MHz-27MHz, 2.8V, 3.0V, and3.3V
>27MHz-52MHz, 2.8V, 3.0V, and3.3V
10MHz-27MHz, 5V
>27MHz-52MHz, 5V
Load Stability, ±10% change
Aging
Stability, temperature and 24 hours
5
Total Stability
5
Pull Range,
Ordering Option
Control Voltage to reach Pull Range
Control Voltage Impedance
Output Enable/Disable
6
,
Ordering Option
Output Enabled
Output Disabled (high impedance output)
Output Level
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
Output Load
Phase Noise, 26.000MHz
10Hz
100Hz
1kHz
10kHz
100kHz
Period Jitter
7
rms
peak-peak
Start Up Time
t
SU
-91
-117
-139
-153
-157
2.5
21.0
2
ps
ps
ms
V
IH
V
IL
V
OH
V
OL
0.9*V
DD
0.1*V
DD
-4
4
15
0.5
100
0.8*V
DD
0.2*V
DD
±5, ±8, ±10, ±12
2.5
I
±0.10
±0.20
±0.20
±0.30
±0.10
±0.5
±0.37
±4.6
ppm
fo
V
DD
I
DD
Min
10
Typ
+2.8, +3.0, +3.3, +5.0
Max
52
3.0
3.5
5.0
6.0
Units
MHz
V
mA
T
OP
-10/70, -20/70, -30/85, -40/85
±0.100, ±0.200 ±0.280 ±0.500, ±1.0, ±2.0
±1.5
°C
ppm
ppm
ppm
ppm 1st yr
ppm
ppm
ppm
V
Kohm
V
V
V
V
mA
mA
pF
dBc/Hz
1. The Output is DC coupled.
2. The VT-803 power supply pin should be filtered, eg, a 10uF, 0.1uF and 0.01uf capacitor.
3. Not all stabilities are available over all temperatures. Measured at mid Vc for parts with frequency tuning
4. After 2 IR reflows and 24 hours.
5. ±100, ±200 and ±280 ppb temp stability parts, all inclusive with 10 years aging.
6. Output is Enabled if E/D is left open.
7. Measured using a Wavecrest SIA3300C, 90K samples.
Page3
Warm Up Time
Frequency versus Vc Over Temperature
Figure 1
The VT-803 start up time is rated at 2ms. Figure 1 shows the Output
Frequency versus time in seconds which shows the output reaching a
steady state frequency within 60 seconds.
Figure 2
The VT-803 output frequency change versus control voltage is very linear
and Figure 2 show the typical performance over temperature.
Allan Deviation, Clipped Sine Wave Output
Allan Deviation, CMOS Output
Figure 3
Test Conditions are under room ambient air flow (non insulated
conditions).
Figure 4
Test Conditions are under room ambient air flow (non insulated
conditions).
Aging
Figure 5
Figure 5 shows an output frequency change of 125ppb typical over 85
days at 85°C which would be equivalent to 125ppb over 2.25 years at
40°C.
Page4
Temperature Stability Graph
Delta Frequency vs. Temperature
Figure 6
Figure 7
Figure 7 shows the change in frequency reading between every adjacent
2°C readings.
Phase Noise Performance, Clipped Sine Wave
Phase Noise Performance, CMOS
Figure 8
Figure 9
Phase Noise Over Temperature
Phase Noise Over Power Supply Variation
Figure 10
Figure 10 shows the difference in the phase noise at 85°C, 25°C and -40°C.
Figure 11
Figure 11 is a phase noise plot at a 2.8, 3.0, 3.3 and 3.6 volt power supply
which demonstrates there is no significant change in performance.
Page5
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