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STM8AP6168TBY

产品描述IC,MICROCONTROLLER,8-BIT,STM8 CPU,CMOS,QFP,48PIN,PLASTIC
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小1MB,共89页
制造商ST(意法半导体)
官网地址http://www.st.com/
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STM8AP6168TBY概述

IC,MICROCONTROLLER,8-BIT,STM8 CPU,CMOS,QFP,48PIN,PLASTIC

STM8AP6168TBY规格参数

参数名称属性值
Objectid114389954
Reach Compliance Codecompliant
YTEOL0
位大小8
CPU系列STM8
JESD-30 代码S-PQFP-G48
端子数量48
最高工作温度105 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码QFP
封装等效代码QFP48,.35SQ,20
封装形状SQUARE
封装形式FLATPACK
认证状态Not Qualified
RAM(字节)2048
ROM(单词)32768
ROM可编程性FLASH
速度16 MHz
最大压摆率14 mA
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.5 mm
端子位置QUAD

文档预览

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STM8AF6x26/4x/66/68
Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM,
10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V
Datasheet
production data
Features
Core
– Max f
CPU
: 16 MHz
– Advanced STM8A core with Harvard
architecture and 3-stage pipeline
– Average 1.6 cycles/instruction resulting in
10 MIPS at 16 MHz f
CPU
for industry
standard benchmark
Memories
– Flash Program memory: 16 to 32 Kbytes
Flash; data retention 20 years at 55 °C
after 1 kcycle
– Data memory: 0.5 to 1 Kbyte true data
EEPROM; endurance 300 kcycles
– RAM: 1 to 2 Kbytes
Clock management
– Low-power crystal resonator oscillator with
external clock input
– Internal, user-trimmable 16 MHz RC and
low-power 128 kHz RC oscillators
– Clock security system with clock monitor
Reset and supply management
– Wait/auto-wakeup/Halt low-power modes
with user definable clock gating
– Low consumption power-on and power-
down reset
Interrupt management
– Nested interrupt controller with 32 vectors
– Up to 34 external interrupts on 5 vectors
Timers
– Up to 2 general purpose 16-bit PWM timers
with up to 3 CAPCOM channels each (IC,
OC or PWM)
– Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-
time insertion and flexible synchronization
– 8-bit AR basic timer with 8-bit prescaler
– Auto-wakeup timer
LQFP48 7x7
LQFP32 7x7
VFQFPN32 5x5
– Window and independent watchdog timers
Communication interfaces
– LINUART
– LIN 2.1 compliant, master/slave modes
with automatic resynchronization
– SPI interface up to 10 Mbit/s or f
MASTER
/2
– I
2
C interface up to 400 Kbit/s
Analog-to-digital converter (ADC)
– 10-bit accuracy, 2LSB TUE accuracy, 2LSB
TUE linearity ADC and up to 10 multiplexed
channels with individual data buffer
– Analog watchdog, scan and continuous
sampling mode
I/Os
– Up to 38 user pins including 10 HS I/Os
– Highly robust I/O design, immune against
current injection
Operating temperature up to 150 °C
Qualification conforms to
AEC-Q100 rev G
Device summary
(1)
Table 1.
Part numbers: STM8AF622x/4x STM8AF6266/68
STM8AF6268, STM8AF6248, STM8AF6266, STM8AF6246,
STM8AF6226
Part numbers: STM8AF612x/4x
(2)
STM8AF6166/68
(2)
STM8AF6168, STM8AF6148, STM8AF6166, STM8AF6146,
STM8AF6126
1.
In the order code, ‘F’ applies to devices with Flash program
memory and data EEPROM while ‘H’ refers to devices with
Flash program memory only. ‘F’ is replaced by ‘P’ for devices
with FASTROM (see Tables
2
and
3,
and
Figure 47).
2.
Not recommended for new design.
July 2012
This is information on a product in full production.
Doc ID 14952 Rev 6
1/89
www.st.com
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