Si5395/94/92 Data Sheet
12-Channel, Any-Frequency, Any-Output Jitter Attenuator/
Clock Multiplier with Ultra-Low Jitter
The Si5395/94/92 Jitter attenuators combine fourth-generation DSPLL™ and Multi-
Synth™ technologies to deliver ultra-low jitter (69 fs) for high performance applica-
tions like 56G SerDes. They are used in applications that demand the highest level
of integration and jitter performance. All PLL components are integrated on-chip,
eliminating the risk of noise coupling associated with discrete solutions. Device
grades J/K/L/M/E have an integrated reference to save board space, improve sys-
tem reliability and reduces the effect of acoustic emissions noise caused by temper-
ature ramps. Grades A/B/C/D/P use an external crystal (XTAL) or crystal oscillator
(XO) reference.
The Si5395/94/92 support free-run, synchronous and holdover modes as well as en-
hanced hitless switching, minimizing the phase transients associated when switching
between input clocks. These devices are programmable via a serial interface with in-
circuit programmable non-volatile memory (NVM) so they always power up with a
known frequency configuration. Programming the Si5395/94/92 is easy with Silicon
Labs’
ClockBuilder
TM
Pro
software. Factory preprogrammed devices are also availa-
ble.
For more information, visit the
https://www.silabs.com/contact-sales
page.
Applications:
• 56G/112G PAM4 SerDes clocking
• OTN muxponders and transponders
• 10/40/100/200/400G networking line cards
• 10/40/100/400 GbE Synchronous Ethernet (ITU-T G.8262)
• Medical imaging
• Test and measurement
÷INT
MultiSynth
MultiSynth
DSPLL
MultiSynth
MultiSynth
MultiSynth
÷INT
÷INT
÷INT
÷INT
÷INT
÷INT
÷INT
÷INT
Status Flags
I
2
C/SPI
Status Monitor
Control
NVM
÷INT
÷INT
÷INT
KEY FEATURES
• Generates any combination of output
frequencies from any input frequency
• Ultra low phase jitter:
• 69 fs RMS (Grade P)
• 71 fs RMS (Grade E)
• 85 fs RMS (integer mode)
• 100 fs RMS (fractional mode)
• Enhanced hitless switching minimizes output
phase transients (0.2 ns typ)
• Input frequency range
• Differential: 8 kHz to 750 MHz
• LVCMOS: 8 kHz to 250 MHz
• Output frequency range
• Differential: 100 Hz to 1028 MHz
• LVCMOS: 100 Hz to 250 MHz
• Meets G.8262, E.8262.1 EEC Standards
• Status monitoring
• Si5395: 4 input, 12 output
• Si5394: 4 input, 4 output
• Si5392: 4 input, 2 output
• External reference: Grades A/B/C/D/P
• Integrated reference: Grades J/K/L/M/E
• Drop-in compatible with Si5345/44/42
Integrated
Reference*
IN0
4 Input
Clocks
IN1
IN2
÷FRAC
÷FRAC
÷FRAC
÷FRAC
OUT0A
Si5392
Si5394
Up to 12
Output Clocks
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT9A
Si5395
IN3/FB_IN
*Only for Si539x J/K/L/M/E grades. Si539x A/B/C/D/P grades have external reference (XTAL or XO)
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Rev. 1.1
Si5395/94/92 Data Sheet
Features List
1. Features List
The Si5395/94/92 features are listed below:
• Generates any output frequency in any format from any input
frequency
• External XTAL or XO reference (A/B/C/D/P)
• Integrated reference (J/K/L/M/E)
• Ultra-low phase jitter of 69 fs (P-Grade)
• Dynamic phase adjust
• Input frequency range
• Differential: 8 kHz–750 MHz
• LVCMOS: 8 kHz–250 MHz
• Output frequency range
• Differential: 100 Hz to 1028 MHz
• LVCMOS: 100 Hz to 250 MHz
• Programmable jitter attenuation bandwidth: 0.1 Hz to 4 kHz
• Meets requirements of:
• ITU-T G.8262 (SyncE) EEC Options 1 and 2
• ITU-T G.8262.1 (Enhanced SyncE) eEEC
• Highly configurable outputs compatible with LVDS, LVPECL,
LVCMOS, CML, and HCSL with programmable signal ampli-
tude
• Status monitoring (LOS, OOF, LOL)
• Enhanced hitless switching for 8 kHz, 19.44 MHz, 25 MHz in-
puts and other frequencies
• Locks to gapped clock inputs
• Free-run and holdover modes
• Drop-in compatible with Si5345/44/42
•
•
•
•
•
Optional zero delay mode
Fast-lock acquisition for low nominal bandwidths
Independent Frequency-on-the fly for each MultiSynth
DCO mode: as low as 0.001 ppb step size
Core voltage
• V
DD
: 1.8 V ±5%
• V
DDA
: 3.3 V ±5%
• Independent output clock supply pins
• 3.3 V, 2.5 V, or 1.8 V
• Serial interface: I
2
C or SPI
• In-circuit programmable with non-volatile OTP memory
• ClockBuilder Pro software simplifies device configuration
• Si5395: 4 input, 12 output
• Grade A/B/C/D/P: 64-QFN 9×9 mm
• Grade J/K/L/M/E: 64-LGA 9x9 mm
• Si5394: 4 input, 4 output
• Grade A/B/C/D/P: 44-QFN 7×7 mm
• Grade J/K/L/M/E: 44-LGA 7x7 mm
• Si5392: 4 input, 2 output
• Grade A/B/C/D/P: 44-QFN 7×7 mm
• Grade J/K/L/M/E: 44-LGA 7x7 mm
• Temperature range: –40 to +85 °C
• Pb-free, RoHS-6 compliant
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Rev. 1.1 | 2
Si5395/94/92 Data Sheet
Related Documents
2. Related Documents
Table 2.1. Related Documentation and Software
Document/Resource
Si5395/94/92 Family Reference Manual
Crystal Reference Manual (Grades A/B/C/D/P only)
UG387: Si5392 Evaluation Board User's Guide
Description/URL
Si5395-94-92 Family Reference Manual
https://www.silabs.com/documents/public/reference-manuals/
si534x-8x-9x-recommended-crystals-rm.pdf
https://www.silabs.com/documents/public/user-guides/ug387-
si5392-evb.pdf
https://www.silabs.com/documents/public/user-guides/ug334-
si5394evb.pdf
https://www.silabs.com/documents/public/user-guides/ug335-
si5395evb.pdf
https://www.silabs.com/documents/public/application-notes/
an1151-using-si539x.pdf
https://www.silabs.com/documents/public/application-notes/
an1155-differences-between-si5342-47-and-si5392-97.pdf
https://www.silabs.com/documents/public/application-notes/
an1178-frequency-otf-jitter-atten-clock-gen.pdf
http://www.silabs.com/Si5395-94-92-FAQ
http://www.silabs.com/quality
https://www.silabs.com/products/development-tools/timing/
clock#highperformance
https://www.silabs.com/products/development-tools/software/
clockbuilder-pro-software
UG334: Si5394 Evaluation Board User's Guide
UG335: Si5395 Evaluation Board User's Guide
AN1151: Using the Si539x in 56G SerDes Applications
AN1155: Differences between Si5342-47 and Si5392-97
AN1178: Frequency-On-the-Fly for Silicon Labs Jitter Attenuators
and Clock Generators
Frequently Asked Questions
Quality and Reliability
Development Kits
ClockBuilder Pro (CBPro) Software
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Rev. 1.1 | 3
Si5395/94/92 Data Sheet
Ordering Guide
3. Ordering Guide
Table 3.1. Si5395/94/92 A/B/C/D/P Ordering Guide (External Reference)
Ordering Part
Number (OPN)
Si5395
Si5395A-A-GM
1, 2
Si5395B-A-GM
1, 2
Si5395C-A-GM
1, 2
Si5395D-A-GM
1, 2
Si5395P-A-GM
1, 2
Si5394
Si5394A-A-GM
1, 2
Si5394B-A-GM
1, 2
Si5394C-A-GM
1, 2
Si5394D-A-GM
1, 2
Si5394P-A-GM
1, 2
Si5392
Si5392A-A-GM
1, 2
Si5392B-A-GM
1, 2
Si5392C-A-GM
1, 2
Si5392D-A-GM
1, 2
Si5392P-A-GM
1, 2
Si5395/94/92 Evaluation Board
Si5395A-A-EVB
Si5395P-A-EVB
Si5394A-A-EVB
Si5394P-A-EVB
12-output
12-output
4-output
4-output
Any-frequency, any Output
Low jitter clocks for 56G PAM4
SerDes
Any-frequency, any Output
Low jitter clocks for 56G PAM4
SerDes
—
—
—
—
64-QFN
EVB
64-QFN
EVB
44-QFN
EVB
44-QFN
EVB
—
—
—
—
4/2
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001to 350 MHz
1 domain
(Section
4.9.2 Grades P and E)
Integer and Fractional
44-QFN
7×7 mm
4/4
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001 to 350 MHz
Up to 2 domains
(Section
4.9.2 Grades P and E)
Integer and Fractional
44-QFN
7×7 mm
4/12
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001 to 350 MHz
Up to 3 domains
(Section
4.9.2 Grades P and E)
Integer and Fractional
64-QFN
9×9 mm
Number of Input/
Output Clocks
Output Clock
Frequency Range (MHz)
Supported Frequency
Synthesis Modes
Package
Reference
Integer Only
External
Precision Calibration
Integer Only
External
Precision Calibration
Integer Only
External
Precision Calibration
Notes:
1. Add an R at the end of the OPN to denote tape and reel ordering options.
2. Custom, factory preprogrammed devices are available. Ordering part numbers are assigned by Silicon Labs and the ClockBuilder
Pro software utility. Custom part number format is “Si5395A-Axxxxx-GM” where “xxxxx” is a unique numerical sequence repre-
senting the preprogrammed configuration.
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Rev. 1.1 | 4
Si5395/94/92 Data Sheet
Ordering Guide
Table 3.2. Si5395/4/2 J/K/L/M/E Ordering guide (Integrated Reference)
Ordering Part
Number (OPN)
Si5395
Si5395J-A-GM
1, 2
Si5395K-A-GM
1, 2
Si5395L-A-GM
1, 2
Si5395M-A-GM
1, 2
Si5395E-A-GM
1, 2
Si5394
Si5394J-A-GM
1, 2
Si5394K-A-GM
1, 2
Si5394L-A-GM
1, 2
Si5394M-A-GM
1, 2
Si5394E-A-GM
1, 2
Si5392
Si5392J-A-GM
1, 2
Si5392K-A-GM
1, 2
Si5392L-A-GM
1, 2
Si5392M-A-GM
1, 2
Si5392E-A-GM
1, 2
Si5395/94/92 Evaluation Board
Si5395J-A-EVB
Si5395E-A-EVB
Si5394J-A-EVB
Si5394E-A-EVB
Si5392J-A-EVB
Si5392E-A-EVB
12-output
12-output
4-output
4-output
2-output
2-output
Any-frequency, any Output
Low jitter clocks for 56G PAM4
SerDes
Any-frequency, any Output
Low jitter clocks for 56G PAM4
SerDes
Any-frequency, any Output
Low jitter clocks for 56G PAM4
SerDes
—
—
—
—
—
—
64-LGA
EVB
64-LGA
EVB
44-LGA
EVB
44-LGA
EVB
44-LGA
EVB
44-LGA
EVB
—
—
—
—
—
—
4/2
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001to 350 MHz
1 domain
(Section
4.9.2 Grades P and E)
Integer and Fractional
44-LGA
7×7 mm
4/4
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001 to 350 MHz
Up to 2 domains
(Section
4.9.2 Grades P and E)
Integer and Fractional
44-LGA
7×7 mm
4/12
0.0001 to 1028 MHz
0.0001 to 350 MHz
0.0001 to 1028 MHz
0.0001 to 350 MHz
Up to 3 domains
(Section
4.9.2 Grades P and E)
Integer and Fractional
64-LGA
9×9 mm
Number of Input/
Output Clocks
Output Clock
Frequency Range (MHz)
Supported Frequency
Synthesis Modes
Package
Reference
Integer Only
Internal
Precision Calibration
Integer Only
Internal
Precision Calibration
Integer Only
Internal
Precision Calibration
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Rev. 1.1 | 5
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