电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SIT9045AIR13-30NPA25.000625D

产品描述LVCMOS Output Clock Oscillator, 25.000625MHz Nom, PQFN, 4 PIN
产品类别无源元件    振荡器   
文件大小789KB,共13页
制造商SiTime
标准
下载文档 详细参数 全文预览

SIT9045AIR13-30NPA25.000625D概述

LVCMOS Output Clock Oscillator, 25.000625MHz Nom, PQFN, 4 PIN

SIT9045AIR13-30NPA25.000625D规格参数

参数名称属性值
是否Rohs认证符合
Objectid145138929979
包装说明SOLCC4,.1,49
Reach Compliance Codeunknown
Country Of OriginMalaysia, Taiwan, Thailand
YTEOL6.88
最长下降时间2 ns
频率调整-机械NO
频率稳定性50%
JESD-609代码e4
安装特点SURFACE MOUNT
端子数量4
标称工作频率25.000625 MHz
最高工作温度85 °C
最低工作温度-40 °C
振荡器类型LVCMOS
输出负载15 pF
最大输出低电流4 mA
封装等效代码SOLCC4,.1,49
物理尺寸2.5mm x 2.0mm x 0.8mm
最长上升时间2 ns
筛选级别AEC-Q100
最大供电电压3.3 V
最小供电电压2.7 V
标称供电电压3 V
表面贴装YES
最大对称度55/45 %
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)

SIT9045AIR13-30NPA25.000625D文档预览

SiT9045
AEC-Q100, 1 to 150 MHz EMI Reduction Oscillator
Features
Applications
Best acceleration sensitivity of 0.1 ppb/g
Spread spectrum for EMI reduction
Wide spread % option
Center spread: from ±0.125% to ±2%, ±0.125% step size
Down spread: -0.25% to -4% with -0.25% step size
Spread profile option: Triangular, Hershey-kiss, Random
Programmable rise/fall time for EMI reduction: 8 options,
0.25 to 40 ns
Extended temperature range (-55°C to 125°C)
Any frequency between 1 MHz and 150 MHz accurate to
6 decimal places
100% pin-to-pin drop-in replacement to quartz-based XO’s
Excellent total frequency stability as low as ±25 ppm
Low power consumption of 6.6 mA typical at 1.8V
Pin1 modes: Standby, output enable, or spread disable
LVCMOS output
Industry-standard packages
QFN: 2.0 x 1.6 mm
2
, 2.5 x 2.0 mm
2
, 3.2 x 2.5 mm
2
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
Avionics systems
Field communication systems
Telemetry applications
Electrical Specifications
Table 1. Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and 3.3V supply voltage.
Parameters
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
1
150
MHz
Frequency Stability and Aging
Frequency Stability
[1]
F_stab
-25
-50
+25
+50
ppm
ppm
Inclusive of initial tolerance at 25°C, 1st year aging at 25°C, and
variations over operating temperature, rated power supply voltage.
Spread = Off.
Operating Temperature Range
Operating Temperature
Range
T_use
-40
-40
-40
-55
+85
+105
+125
+125
°C
°C
°C
°C
AEC-Q100 Grade 3
AEC-Q100 Grade 2
AEC-Q100 Grade 1
Extended cold AEC-Q100 Grade 1
Supply Voltage and Current Consumption
Supply Voltage
Vdd
1.62
2.25
2.52
2.7
2.97
2.25
Current Consumption
Idd
OE Disable Current
I_OD
Standby Current
I_std
1.8
2.5
2.8
3.0
3.3
7.9
6.6
5.3
5.0
2.6
0.6
1.98
2.75
3.08
3.3
3.63
3.63
9.5
8.0
6.5
6.0
9.0
5.0
V
V
V
V
V
V
mA
mA
mA
mA
A
A
No load condition, f = 148.5 MHz, Vdd = 2.5V to 3.3V
No load condition, f = 148.5 MHz, Vdd = 1.8V
f = 148.5 MHz, Vdd = 2.5V to 3.3V, OE = GND, Output in high-Z state
f = 148.5 MHz, Vdd = 1.8V, OE = GND, Output in high-Z state
ST
= GND, Vdd = 2.5V to 3.3V, Output is weakly pulled down
ST
= GND, Vdd = 1.8V, Output is weakly pulled down
Rev 1.01
August 13, 2020
www.sitime.com
SiT9045
AEC-Q100, 1 to 150 MHz EMI Reduction Oscillator
Table 1. Electrical Characteristics
(continued)
Parameters
Acceleration (g) sensitivity,
Gamma Vector
Symbol
F_g
Min.
Typ.
Max.
0.1
Unit
ppb/g
Condition
Low sensitivity grade; total gamma over 3 axes; 15 Hz to 2 kHz; MIL-
PRF-55310, computed per section 4.8.18.3.1
Rugged Characteristics
LVCMOS Output Characteristics
Duty Cycle
Rise/Fall Time
Output High Voltage
DC
Tr, Tf
VOH
45
43
90%
1.2
55
57
2.0
%
%
ns
Vdd
f = 1 to 137 MHz
f = 137.000001 to 150 MHz
20% - 80%, default derive strength
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Output Low Voltage
VOL
10%
Vdd
Input Characteristics
Input High Voltage
Input Low Voltage
Input Leakage Current
VIH
VIL
IL
70%
Startup Time
Enable/Disable Time
Resume Time
Spread Enable Time
Spread Disable Time
Cycle-to-cycle jitter
T_start
T_oe
T_resume
T_sde
T_sdde
T_ccj
Note:
1.
Contact SiTime
for ±20 ppm options.
-2.3
2.8
-24.6
3.2
10.5
10.8
30%
10
215
10
4
55
Vdd
Vdd
µA
µA
µA
µA
ms
ns
ms
µs
µs
Jitter
ps
ps
f = 148.5 MHz, Vdd = 2.5 to 3.3V, Spread = ON (or OFF)
f = 148.5 MHz, Vdd = 1.8V, Spread = ON (or OFF)
Pin 1, OE or
ST
Pin 1, OE or
ST
Pin1,
ST
logic low
Pin1,
ST
logic high
Pin1, OE / SD logic low
Pin1, OE / SD logic high
Measured from the time Vdd reaches its rated minimum value
f = 148.5 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles
Measured from the time ST pin crosses 50% threshold
Measured from the time SD pin crosses 50% threshold
Measured from the time SD pin crosses 50% threshold
Startup and Resume Timing
Table 2. Spread Spectrum %
[3]
Ordering Code
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Center Spread
(%)
±0.125
±0.250
±0.390
±0.515
±0.640
±0.765
±0.905
±1.030
±1.155
±1.280
±1.420
±1.545
±1.670
±1.795
±1.935
±2.060
Down Spread
(%)
-0.25
-0.50
-0.78
-1.04
-1.29
-1.55
-1.84
-2.10
-2.36
-2.62
-2.91
-3.18
-3.45
-3.71
-4.01
-4.28
Table 3. Spread Profile
[2,3]
Spread Profile
Triangular
Hershey-kiss
Random
Notes:
2. In both Triangular and Hershey-kiss profiles, modulation rate is
employed with a frequency of ~31.25 kHz. In random profile,
modulation rate is ~ 8.6 kHz.
3. The random profile supports up to ±1.030% center spread or -
2.10% down spread (ordering codes A through H).
Rev 1.01
Page 2 of 13
www.sitime.com
SiT9045
AEC-Q100, 1 to 150 MHz EMI Reduction Oscillator
Table 4. Pin Description
Pin
1
Symbol
OE /
ST
/
NC / SD
Output
Enable
Standby
Functionality
H
[4]
: specified frequency output
L: output is high impedance. Only output driver is disabled.
H : specified frequency output
L: output is low (week pull down). Device goes to sleep mode.
Supply current reduced to I_std.
Pin1 has no function (Any voltage between 0 and Vdd or Open)
H: Spread = ON
L: Spread = OFF
Electrical ground
Oscillator output
Power supply voltage
[5]
[4]
Top View
OE /
/
NC / SD
1
4
VDD
No Connect
Spread
Disable
2
3
4
Notes:
GND
OUT
VDD
Power
Output
Power
GND
2
3
OUT
Figure 1. Pin Assignments
4. In OE or
ST
mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option.
5. A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Table 5. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of
the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
Vdd
Electrostatic Discharge
Soldering Temperature (follow standard Pb free soldering guidelines)
Junction Temperature
[6]
Note:
6. Exceeding this temperature for extended period of time may damage the device.
Min.
-65
-0.5
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Table 6. Maximum Operating Junction Temperature
[7]
Max Operating Temperature (ambient)
85°C
105°C
125°C
Note:
7. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Maximum Operating Junction Temperature
95°C
115°C
135°C
Table 7. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev 1.01
Page 3 of 13
www.sitime.com
SiT9045
AEC-Q100, 1 to 150 MHz EMI Reduction Oscillator
Timing Diagrams
Vdd
90% Vdd
Vdd
50% Vdd
T_resume
Pin 4 Voltage
T_start
No Glitch
[8]
during start up
ST Voltage
CLK Output
HZ
T_start: Time to start from power-off
CLK Output
HZ
T_resume: Time to resume from ST
Figure 2. Startup Timing
Figure 3. Standby Resume Timing (ST Mode Only)
Vdd
50% Vdd
OE Voltage
T_oe
Vdd
OE Voltage
50% Vdd
T_oe
CLK Output
HZ
T_oe: Time to re-enable the clock output
CLK Output
HZ
T_oe: Time to put the output in High Z mode
Figure 4. OE Enable Timing (OE Mode Only)
Figure 5. OE Disable Timing (OE Mode Only)
Vdd
50% Vdd
SD Voltage
T_sde
SD Voltage
Vdd
50% Vdd
Frequency
Deviation (%)
T_sdde
Modulation period = 32µs (31.25kHz)
Time (s)
Frequency
Deviation (%)
Time (s)
Figure 6. SD Enable Timing (SD Mode Only)
Note:
8. SiT9045 has “no runt” pulses and “no glitch” output during startup or resume.
Figure 7. SD Diable Timing (SD Mode Only)
Rev 1.01
Page 4 of 13
www.sitime.com
SiT9045
AEC-Q100, 1 to 150 MHz EMI Reduction Oscillator
Performance Plots
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
5.4
8.0
Current Consumption (mA)
5.2
5.0
4.8
4.6
4.4
0
20
40
60
80
100
120
140
OE Disable Current (mA)
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
0
20
40
60
80
100
120
140
Frequency (MHz)
Frequency (MHz)
Figure 8. Current Consumption vs Frequency
Figure 9. OE Disable Current vs Frequency
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
DUT1
DUT8
DUT15
DUT2
DUT9
DUT16
DUT3
FUT10
DUT17
DUT4
DUT11
DUT18
DUT5
DUT12
DUT19
DUT6
DUT13
DUT20
DUT7
DUT14
2.5
2.0
20
Frequency stability (ppm)
0
20
40
60
80
100
120
140
15
10
Standby Current (µA)
1.5
1.0
0.5
0.0
5
0
-5
-10
-15
-20
-40
-20
0
20
40
60
80
100
120
Frequency (MHz)
Temperature (°C)
Figure 10. Standby Current vs Frequency
Figure 11. Frequency vs Temperature
1.8V
90
2.5V
2.8V
3.0V
3.3V
Peak Cycle -to - Cycle Jitter (ps)
80
70
60
50
40
30
20
10
0
0
20
40
60
80
100
120
140
Frequency (MHz)
Figure 12. Cycle-to-cycle Jitter vs Frequency
(Spread profile: Triangular, Spread type: center,
Spread percentage: ±2.060%)
Rev 1.01
Page 5 of 13
www.sitime.com
分享 Cadence PCB 16.6网络免费培训
cadence公司于2012年9月25日发布了具有一系列新功能的Cadence 16.6 PCB设计解决方案,用户定制功能增强,模拟性能提高20%, 使用户得以更快、更有预见性地创建产品。 为了让大家更好的了解并学 ......
njust_wu PCB设计
对自己编程能力有信心?来试试吧
http://www.nowcoder.com/books/coding-interviews 递归和循环跳台阶42427.02% 递归和循环变态跳台阶25331.51% 递归和循环矩形覆盖17430.16% 数组二维数组中的查找13320.29% ......
247153481 嵌入式系统
~~~~~~~~~~本人第一次参加比赛 求大家帮帮忙啊~~~~~~~~~~
本人参加学校的电子设计比赛 题目不限 可是不知道做点什么啊 求哪位大侠给我个建议 不要太难的 本人上大三 谢谢 最好带资料 在线等 活发邮箱523849997@qq.com 谢谢...
眯眼 DIY/开源硬件专区
【小梅哥FPGA进阶教程】第四章 数码管动态扫描驱动设计与验证
数码管动态扫描驱动设计与验证 在电子系统中,通常都需要有输出设备来输出或显示一定的信息,以指示当前系统运行的状态。在以单片机和ARM为主的电子系统中,液晶屏是理想的输出设备。而FPG ......
芯航线跑堂 FPGA/CPLD
视频:平头哥RISC-V低功耗板-RVB2601与ART-PI共同实现语音识别
本帖最后由 火辣西米秀 于 2021-7-15 08:26 编辑 平头哥RISC-V低功耗板-RVB2601与ART-PI共同实现语音识别 RVB2601采集音频信息通过SPI接口把数据发送给 ART-PI,ART-PI把数据上传到百度云 ......
火辣西米秀 国产芯片交流
西门子将在10月前分拆网络业务为合资做准备
据美国《福布斯》引述德国媒体报道,西门子公司将在今年10月份前将其电信网络产品部门分拆为一个独立实体,从而为明年初诺基亚公司的网络业务合并重组早做准备。   据德国《南德意志报》引述 ......
myy 无线连接

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2261  468  2139  2317  309  46  10  44  47  7 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved