FemtoClocks™
Crystal-to-LVCMOS/LVTTL Frequency
840001-34
DATASHEET
General Description
The 840001-34 is a two output LVCMOS/LVTTL Synthesizer. One
output is the LVCMOS/LVTTL main synthesized clock output (Q)
and one output is a three-state LVCMOS/LVTTL reference clock
(REF_OUT) output at the frequency of the crystal oscillator. The
device can accept crystals from 15.3125MHz to 42.67MHz and
can synthesize outputs from 81.67MHz to 213.33MHz. The
840001-34 is packaged in a 3mm x 3mm 16-pin VFQFN, making it
ideal for use on space constrained boards..
Features
•
•
•
•
•
•
•
•
Two LVCMOS/LVTTL outputs, 22 typical output impedance
One main clock output (Q)
One three-state reference clock output (REF_OUT)
Crystal oscillator interface can accept crystals from
15.3125MHz to 42.67MHz, 18pF parallel resonant crystal
Q output frequency range: 81.67MHz to 213.33MHz
RMS phase jitter @106.25, (637kHz – 10MHz): 0.38ps (typical)
VCO range: 490MHz to 640MHz
Full 3.3V and 2.5V operating supply
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
Common Application Configuration Table
Inputs
Crystal (MHz)
40
26.5625
40
26.5625
25
25
22.5
19.44
M Divider
15
24
15
24
25
25
25
32
VCO (MHz)
600
637.5
600
637.5
625
625
562.5
622.08
N Divider
6
6
4
3
5
4
3
4
Output Frequency
(MHz)
100 (default)
106.25
150
212.5
125
156.25
187.5
155.52
Application
Serial Attached (SCSI),
PCI Express, Processor Clock
Fibre Channel
Serial ATA (SATA), Processor Clock
Fibre Channel 2
Ethernet
10 Gigabit Ethernet
12 Gigabit Ethernet
SONET
Block Diagram
OE
(Pullup)
Pin Assignment
V
DDA
REF_OUT
OE 1
XTAL_IN
16 15 14 13
12 Q
11 V
DDO
10 GND
9 V
DD
5
M1
OSC
XTAL_OUT
Phase
Detector
VCO
490MHz - 640MHz
N-Div
00 = ÷3
01 = ÷4
10 = ÷5
11 = ÷6
(default)
XTAL_IN
Q
2
XTAL_OUT 3
M0 4
6
nc
nc
7
N0
M-Div
11 = ÷15
(default)
10 = ÷24
01 = ÷25
00 = ÷32
M1
(Pullup)
840001-34
16 Lead VFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
M0
(Pullup)
N1
(Pullup)
N0
(Pullup)
840001-34 Rev A 3/30/15
1
©2015 Integrated Device Technology, Inc.
N1
REF_OUT
nc
8
840001-34 DATASHEET
Table 1. Pin Descriptions
Number
1
2,
3
4, 5
6, 14, 15
7, 8
9
10
11
12
13
16
Name
OE
XTAL_IN,
XTAL_OUT
M0, M1
nc
N0, N1
V
DD
GND
V
DDO
Q
REF_OUT
V
DDA
Input
Input
Input
Unused
Input
Power
Power
Power
Output
Output
Power
Pullup
Pullup
Type
Pullup
Description
Output enable pin. When HIGH, REF_OUT output is enabled. When LOW,
forces REF_OUT to Hi-Z state. See Table 3A. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output.
M divider inputs. LVCMOS/LVTTL interface levels. See Table 3B.
No connect.
Determines output divider value as defined in Table 3C.
LVCMOS/LVTTL interface levels.
Core supply pin.
Power supply ground.
Output supply pin.
Single-ended clock output. 22 typical output impedance.
LVCMOS/LVTTL interface levels.
Single-ended three-state reference clock output. 22 typical output impedance.
LVCMOS/LVTTL interface levels.
Analog supply pin.
NOTE:
Pullup
refers to intenal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
C
PD
R
PULLUP
R
OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Output Impedance
V
DD,
V
DDO
= 3.3V±5%
V
DD,
V
DDO
= 2.5V±5%
14
16
V
DD,
V
DDO
= 3.465V
V
DD,
V
DDO
= 2.625V
Test Conditions
Minimum
Typical
4
8
6
51
22
26
30
36
Maximum
Units
pF
pF
pF
k
Rev A 3/30/15
2
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
840001-34 DATASHEET
Table 3A. Control Input Function Table
Control Input
OE
0
1
Output
REF_OUT
Hi-Z
Active (default)
Table 3B. M Divider Function Table
Control Inputs
M1
0
0
1
1
M0
0
1
0
1
Feedback Divider Ratio
÷32
÷25
÷24
÷15 (default)
Table 3C. N Divider Function Table
Control Inputs
N1
0
0
1
1
N0
0
1
0
1
Output Divider Ratio
÷3
÷4
÷5
÷6 (default)
Rev A 3/30/15
3
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
840001-34 DATASHEET
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC
Characterisitcs
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Item
Supply Voltage, V
DD
Inputs, V
I
Outputs,V
O
Package Thermal Impedance,
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
DD
+ 0.5V
-0.5V to V
DD
+ 0.5V
76.1C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
DD
= V
DDO
= 3.3V ± 5%, T
A
= 0°C to 70°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Positive Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
V
DD
– 0.12
3.135
Typical
3.3
3.3
3.3
Maximum
3.465
V
DD
3.465
100
12
35
Units
V
V
V
mA
mA
mA
Table 4B. Power Supply DC Characteristics,
V
DD
= V
DDO
= 2.5V ± 5%, T
A
= 0°C to 70°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Positive Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
Test Conditions
Minimum
2.375
V
DD
– 0.12
2.375
Typical
2.5
3.3
2.5
Maximum
2.625
V
DD
2.625
90
12
25
Units
V
V
V
mA
mA
mA
Rev A 3/30/15
4
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
840001-34 DATASHEET
Table 4C. LVCMOS/LVTTL DC Characteristics,
V
DD
= V
DDO
= 3.3V ± 5% or 2.5V ± 5%, T
A
= 0°C to 70°CC
Symbol
V
IH
Parameter
Input High Voltage
Test Conditions
V
DD
= 3.3V
V
DD
= 2.5V
Input Low Voltage
Input High
Current
Input Low
Current
OE, M0, M1,
N0, N1
OE, M0, M1,
N0, N1
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= V
IN
= 3.465V or 2.625V
V
DD
= V
IN
= 3.465V or 2.625V
V
DDO
= 3.3V±5%
V
DDO
= 2.5V±5%
Output Low Voltage; NOTE 1
V
DDO
= 3.3V±5% or 2.5V±5%
-150
2.6
1.8
0.5
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
5
Units
V
V
V
V
µA
µA
V
V
V
V
IL
I
IH
I
IL
V
OH
V
OL
Output High Voltage; NOTE 1
NOTE 1: Outputs terminated with 50 to V
DDO
/2. See Parameter Measurement Information, Output Load Test Circuit diagrams.
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: It is not recommended to overdrive the crystal input with an external clock.
15.3125
Test Conditions
Minimum
Typical
Fundamental
42.67
50
7
1
MHz
pF
mW
Maximum
Units
Rev A 3/30/15
5
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY
SYNTHESIZER
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