EVALUATION KIT AVAILABLE
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
General Description
The MAX9263/MAX9264 chipset extends Maxim’s gigabit
multimedia serial link (GMSL) technology to include high-
bandwidth digital content protection (HDCP) encryption
of video and audio data. The MAX9263 serializer, or
any HDCP-GMSL serializer, pairs with the MAX9264
deserializer, or any HDCP-GMSL deserializer, for the
transmission of control data and HDCP encrypted video
and audio data.
The parallel interface operates with a pixel clock up to
104MHz. Three inputs are for I
2
S audio, supporting a
sampling frequency to 192kHz and a sample depth to
32 bits. The embedded control channel forms a full-
duplex differential 9.6kbps to 1Mbps UART link between
the serializer and deserializer. A microcontroller (FC),
can be located on the serializer side of the link, on the
deserializer side of the link, or on both sides. The control
channel enables
FC
control of peripherals on the remote
side, such as backlight control, touch screen, and per-
form HDCP-related operations.
For driving longer cables, the serializer has program-
mable pre/deemphasis, and the deserializer has a pro-
grammable channel equalizer. The GMSL devices have
programmable spread spectrum on the serial (serializer)
and parallel (deserializer) output. The serial link input
and output meet ISO 10605 and IEC 61000-4-2 ESD
standards. The serializer core supply is 1.8V and the
deserializer core supply is 3.3V. The I/O supply is 1.8V to
3.3V. Both devices are available in a 64-pin TQFP pack-
age with an exposed pad and are specified over the
-40NC to +105NC automotive temperature range.
Benefits and Features
S
Ideal for HDCP Video Applications
Supports Up to XGA (1280 x 768) or Dual-View
WVGA (2x 854 x 480)
Pre/Deemphasis and Equalization Allows 15m
Cable at Full Speed
Up to 192kHz, 32-Bit/Sample I
2
S
S
Multiple Data Rates for System Flexibility
Up to 3.12Gbps Serial-Bit Rate
6.25MHz to 104MHz Pixel Clock
100kbps to 1Mbps UART and UART-to-I
2
C
Control Channel
S
Reduces EMI and Shielding Requirements
Serial Output Programmable for 100mV to
400mV
Programmable Spread Spectrum Reduces EMI
Bypassable Input PLL for Jitter Attenuation
S
Peripheral Features for System Power-Up and
Verification
Built-In PRBS Tester for BER Testing of the
Serial Link
Interrupt Transmission from Deserializer to
Serializer
S
Meets Rigorous Automotive and Industrial
Requirements
-40°C to +105°C Operating Temperature
ISO 10605 and IEC 61000-4-2 ESD Tolerance
Ordering Information
PART
MAX9263GCB/V+
MAX9263GCB/V+T
MAX9264GCB/V+
MAX9264GCB/V+T
TEMP RANGE
-40NC to +105NC
-40NC to +105NC
-40NC to +105NC
-40NC to +105NC
PIN-PACKAGE
64 TQFP-EP*
64 TQFP-EP*
64 TQFP-EP*
64 TQFP-EP*
Applications
High-Resolution Automotive Navigation
Rear-Seat Infotainment
Megapixel Camera Systems
/V denotes an automotive qualified product.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
T = Tape and reel.
Blu-ray is a trademark of Blu-ray Disc Association.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5644; Rev 2; 9/14
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
ABSOLUTE MAXIMUM RATINGS
AVDD to AGND
MAX9263 ............................................................-0.5V
MAX9264 ............................................................-0.5V
DVDD to GND (MAX9263) ...................................-0.5V
DVDD to DGND (MAX9264) .................................-0.5V
IOVDD to GND (MAX9263) ..................................-0.5V
IOVDD to IOGND (MAX9264) ..............................-0.5V
Any Ground to Any Ground .................................-0.5V
OUT+, OUT- to AGND (MAX9263) ......................-0.5V
IN+, IN- to AGND (MAX9264) ..............................-0.5V
to
to
to
to
to
to
to
to
to
+1.9V
+3.9V
+1.9V
+3.9V
+3.9V
+3.9V
+0.5V
+1.9V
+1.9V
LMN_ to AGND (MAX9263)
(15mA current limit) ..........................................-0.5V to +3.9V
All Other Pins to GND (MAX9263) ...... -0.5V to (V
IOVDD
+ 0.5V)
All Other Pins to IOGND (MAX9264) ... -0.5V to (V
IOVDD
+ 0.5V)
Continuous Power Dissipation (T
A
= +70NC )
64-Pin TQFP (derate 31.3mW/NC above +70NC) .....2507.8mW
Operating Temperature Range ........................ -40NC to +105NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
64 TQFP-EP
Junction-to-Ambient Thermal Resistance (B
JA
) ...........31.9NC/W
Junction-to-Case Thermal Resistance (B
JC
) .....................1NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
MAX9263 DC ELECTRICAL CHARACTERISTICS
(V
AVDD
= V
DVDD
= 1.7V to 1.9V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100I
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 1.8V, T
A
= +25NC.)
PARAMETER
SYMBOL
CONDITIONS
DIN_, PCLKIN,
AUTOS,
MS, CDS, SSEN,
DRS, ES, BWS
SD, SCK, WS
Low-Level Input Voltage
Input Current
Input Clamp Voltage
SINGLE-ENDED OUTPUT (INT)
High-Level Output Voltage
Low-Level Output Voltage
OUTPUT Short-Circuit Current
V
OH1
V
OL1
I
OS
I
OUT
= -2mA
I
OUT
= 2mA
V
O
= V
GND
V
IOVDD
= 3.0V to 3.6V
V
IOVDD
= 1.7V to 1.9V
16
3
0.7 x
V
IOVDD
0.3 x
V
IOVDD
35
12
V
IOVDD
- 0.2
0.2
64
21
V
V
mA
V
IL1
I
IN1
V
CL
V
IN
= 0 to V
IOVDD
I
CL
= -18mA
-10
MIN
0.65 x
V
IOVDD
0.7 x
V
IOVDD
0.35 x
V
IOVDD
+10
-1.5
TYP
MAX
UNITS
SINGLE-ENDED INPUTS (DIN_, PCLKIN, SD, SCK, WS,
AUTOS,
MS, CDS,
PWDN,
SSEN, DRS, ES, BWS)
High-Level Input Voltage
V
IH1
V
V
FA
V
I
2
C/UART, I/O, AND OPEN-DRAIN OUTPUTS (RX/SDA, TX/SCL,
LFLT)
High-Level Input Voltage
Low-Level Input Voltage
V
IH2
V
IL2
V
V
2
Maxim Integrated
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263 DC ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= V
DVDD
= 1.7V to 1.9V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100I
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 1.8V, T
A
= +25NC.)
PARAMETER
Input Current
Low-Level Output Voltage
SYMBOL
I
IN2
V
OL2
CONDITIONS
V
IN
= 0 to V
IOVDD
(Note 2)
I
OUT
= 3mA
V
IOVDD
= 1.7V to 1.9V
V
IOVDD
= 3.0V to 3.6V
300
350
240
400
MIN
-110
TYP
MAX
+5
0.4
0.3
500
610
425
15
Preemphasis off
1.1
1.4
1.56
15
V
OUT+
or V
OUT-
= 0V
V
OUT+
or V
OUT-
= 1.9V
V
OD
= 0V
From OUT+, OUT- to V
AVDD
45
54
-60
25
25
63
mV
V
mV
mA
mA
I
mV
UNITS
FA
V
DIFFERENTIAL OUTPUT (OUT+, OUT-)
Preemphasis off (Figure 1)
Differential Output Voltage
Change in V
OD
Between
Complementary Output States
Output Offset Voltage (V
OUT+
+
V
OUT-
)/2 = V
OS
Change in V
OS
Between
Complementary Output States
Output Short-Circuit Current
Magnitude of Differential Output
Short-Circuit Current
Output Termination Resistance
(Internal)
High Switching Threshold
Low Switching Threshold
Short-to-GND Threshold
Normal Thresholds
Open Thresholds
Open Input Voltage
Short-to-Battery Threshold
POWER SUPPLY
f
PCLKIN
= 16.6MHz
Worst-Case Supply Current
(Figure 4, Note 3)
Sleep Mode Supply Current
Power-Down Supply Current
I
WCS
BWS = GND
f
PCLKIN
= 33.3MHz
f
PCLKIN
= 66.6MHz
f
PCLKIN
= 104MHz
I
CCS
I
CCZ
PWDN
= GND
105
110
120
145
45
7
132
152
160
188
225
180
FA
FA
mA
V
OD
3.3dB preemphasis setting (Figure 2)
3.3dB deemphasis setting (Figure 2)
DV
OD
V
OS
DV
OS
I
OS
I
OSD
R
O
REVERSE CONTROL-CHANNEL RECEIVER (OUT+, OUT-)
V
CHR
V
CLR
V
TG
V
TN
V
TO
V
IO
V
TE
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
0.57
1.45
1.47
2.47
-27
0.3
1.07
V
IO
+
60mV
1.75
27
mV
mV
V
V
V
V
V
LINE-FAULT-DETECTION INPUTS (LMN_)
Maxim Integrated
3
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263 DC ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= V
DVDD
= 1.7V to 1.9V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100I
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 1.8V, T
A
= +25NC.)
PARAMETER
ESD PROTECTION
Human Body Model, R
D
= 1.5kI,
C
S
= 100pF (Note 4)
OUT+, OUT-
V
ESD
IEC 61000-4-2,
R
D
= 330I,
C
S
= 150pF (Note 5)
ISO 10605,
R
D
= 2kI,
C
S
= 330pF (Note 5)
All Other Pins
V
ESD
Contact discharge
Air discharge
Contact discharge
Air discharge
Q8
Q10
Q12
Q10
Q25
Q4
kV
kV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Human Body Model, R
D
= 1.5kI,
C
S
= 100pF (Note 4)
MAX9263 AC ELECTRICAL CHARACTERISTICS
(V
DVDD
= V
AVDD
= 1.7V to 1.9V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100I
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
DVDD
= V
AVDD
= V
IOVDD
= 1.8V, T
A
= +25NC.)
PARAMETER
CLOCK INPUT TIMING (PCLKIN)
BWS = GND, V
DRS
= V
IOVDD
Clock Frequency
f
PCLKIN
BWS = GND, DRS = GND
V
BWS
= V
IOVDD
, V
DRS
= V
IOVDD
V
BWS
= V
IOVDD
, DRS = GND
Clock Duty Cycle
Clock Transition Time
Clock Jitter
I
2
C/UART PORT TIMING
I
2
C/UART Bit Rate
Output Rise Time
Output Fall Time
Input Setup Time
Input Hold Time
SWITCHING CHARACTERISTICS
Differential Output Rise/Fall Time
t
R
, t
F
20% to 80%, V
OD
≥ 400mV, R
L
= 100I,
serial-bit rate = 3.125Gbps (Note 6)
3.125Gbps PRBS signal, measured at
V
OD
= 0V differential, preemphasis
disabled (Figure 7)
90
150
ps
t
R
t
F
t
SET
t
HOLD
30% to 70%, C
L
= 10pF to 100pF,
1kI pullup to V
IOVDD
70% to 30%, C
L
= 10pF to 100pF,
1kI pullup to V
IOVDD
I
2
C only (Figure 6, Note 6)
I
2
C only (Figure 6, Note 6)
9.6
20
20
100
0
1000
150
150
kbps
ns
ns
ns
ns
DC
t
R
, t
F
t
J
t
HIGH
/t
T
or t
LOW
/t
T
(Figure 5, Note 6)
(Figure 5, Note 6)
3.125Gbps, 300kHz sinusoidal jitter (Note 6)
8.33
16.66
6.25
12.5
35
50
16.66
104
12.5
78
65
4
800
%
ns
ps
(P-P)
MHz
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Total Serial Output Jitter
t
TSOJ1
0.25
UI
4
Maxim Integrated
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263 AC ELECTRICAL CHARACTERISTICS
(V
DVDD
= V
AVDD
= 1.7V to 1.9V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100I
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
DVDD
= V
AVDD
= V
IOVDD
= 1.8V, T
A
= +25NC.)
PARAMETER
Deterministic Serial Output Jitter
Parallel Data Input Setup Time
Parallel Data Input Hold Time
Serializer Delay (Notes 6, 7)
(Figure 1)
Link Start Time
Power-Up Time
I
2
S INPUT TIMING
WS Frequency
Sample Word Length
SCK Frequency
SCK Clock High Time
SCK Clock Low Time
SD, WS Setup Time
SD, WS Hold Time
f
WS
n
WS
f
SCK
t
HC
t
LC
t
SET
t
HOLD
See Table 2
See Table 2
f
SCK
= f
WS
x n
WS
x 2
V
SCK
R
V
IH
, t
SCK
= 1/f
SCK
V
SCK
P
V
IL
, t
SCK
= 1/f
SCK
(Figure 12)
(Figure 12)
8
4
(8 x
4) x 2
0.35 x
t
SCK
0.35 x
t
SCK
2
2
192
32
(192 x
32) x 2
kHz
bits
kHz
ns
ns
ns
ns
SYMBOL
t
DSOJ2
t
SET
t
HOLD
t
SD
t
LOCK
t
PU
CONDITIONS
3.125Gbps PRBS signal
(Figure 8, Note 6)
(Figure 8, Note 6)
(Figure 9)
(Figure 10)
(Figure 11)
Spread spectrum enabled
Spread spectrum disabled
1
1.5
2830
270
3.5
6
MIN
TYP
0.15
MAX
UNITS
UI
ns
ns
Bits
ms
ms
MAX9264 DC ELECTRICAL CHARACTERISTICS
(V
AVDD
= V
DVDD
= 3.0V to 3.6V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100I
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 3.3V, T
A
= +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN
0.65 x
V
IOVDD
0.35 x
V
IOVDD
V
IN
= 0 to V
IOVDD
I
CL
= -18mA
DCS = IOGND
High-Level Output Voltage
V
OH1
I
OUT
= -2mA
V
DCS
= V
IOVDD
Low-Level Output Voltage
V
OL1
I
OUT
= 2mA
DCS = IOGND
V
DCS
= V
IOVDD
-10
+10
-1.5
TYP
MAX
UNITS
SINGLE-ENDED INPUTS (ENABLE, BWS, INT, CDS, ES, EQS, DCS, MS,
PWDN,
SSEN, DRS)
High-Level Input Voltage
Low-Level Input Voltage
Input Current
Input Clamp Voltage
V
IH1
V
IL1
I
IN1
V
CL
V
V
FA
V
SINGLE-ENDED OUTPUTS (WS, SCK, SD, DOUT_, PCLKOUT)
V
IOVDD
- 0.3
V
IOVDD
- 0.2
0.3
0.2
V
V
Maxim Integrated
5
FPGA/CPLD
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